[U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes

Vikas Manocha
2015-06-17T02:14:18Z

This patchset:
- removes sram polling while reading/writing from flash.
- fixes trigger base & transfer start address register programming. This fix
superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger
address setting"
- adds support to get fifo width from device tree

Vikas Manocha (7):
spi: cadence_qspi: remove sram polling from flash read
spi: cadence_qspi: read can be independent of fifo width
spi: cadence_qspi: remove sram polling from flash write
spi: cadence_qspi: move trigger base configuration in init
spi: cadence_qspi: fix indirect read/write start address
spi: cadence_qspi: fix base trigger address & transfer start address
spi: cadence_qspi: get fifo width from device tree

arch/arm/dts/socfpga.dtsi | 2 +
arch/arm/dts/stv0991.dts | 4 +-
drivers/spi/cadence_qspi.c | 14 ++--
drivers/spi/cadence_qspi.h | 6 +-
drivers/spi/cadence_qspi_apb.c | 140 ++++++++++------------------------------
5 files changed, 50 insertions(+), 116 deletions(-)

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1.7.9.5