From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 7/9] imx: mx6: ddr init MMDC according to ddr_type
Date: Mon, 17 Aug 2015 09:41:26 +0200 [thread overview]
Message-ID: <55D19026.9050401@denx.de> (raw)
In-Reply-To: <20150817062520.GA1835@shlinux2>
On 17.08.2015 08:25, Peng Fan wrote:
> On Mon, Aug 17, 2015 at 09:20:15AM +0200, Stefan Roese wrote:
>> On 17.08.2015 07:59, Peng Fan wrote:
>>> On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
>>>> On 17.08.2015 05:29, Peng Fan wrote:
>>>>> To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
>>>>> to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
>>>>> The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
>>>>> when ddr_type is for DDR3. Later we can use ddr_type to initialize
>>>>> MMDC for LPDDR2.
>>>>> Initialize ddr_type for different boards which enable SPL.
>>>>>
>>>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>>>> Cc: Stefano Babic <sbabic@denx.de>
>>>>> Cc: Tim Harvey <tharvey@gateworks.com>
>>>>> Cc: Stefan Roese <sr@denx.de>
>>>>> Cc: Fabio Estevam <fabio.estevam@freescale.com>
>>>>> ---
>>>>> arch/arm/cpu/armv7/mx6/ddr.c | 14 +++++++++++++-
>>>>> arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 +-
>>>>> board/barco/platinum/spl_picon.c | 1 +
>>>>> board/barco/platinum/spl_titanium.c | 1 +
>>>>> board/freescale/mx6sabresd/mx6sabresd.c | 1 +
>>>>> board/freescale/mx6sxsabresd/mx6sxsabresd.c | 1 +
>>>>> board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 1 +
>>>>> board/gateworks/gw_ventana/gw_ventana_spl.c | 1 +
>>>>> board/solidrun/mx6cuboxi/mx6cuboxi.c | 1 +
>>>>> 9 files changed, 21 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
>>>>> index 3f23abf..a6bef60 100644
>>>>> --- a/arch/arm/cpu/armv7/mx6/ddr.c
>>>>> +++ b/arch/arm/cpu/armv7/mx6/ddr.c
>>>>> @@ -348,7 +348,7 @@ void mx6sdl_dram_iocfg(unsigned width,
>>>>> mmdc1->entry = value; \
>>>>> } while (0)
>>>>>
>>>>> -void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
>>>>> +void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,
>>>>> const struct mx6_mmdc_calibration *calib,
>>>>> const struct mx6_ddr3_cfg *ddr3_cfg)
>>>>> {
>>>>> @@ -655,3 +655,15 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
>>>>> /* wait for auto-ZQ calibration to complete */
>>>>> mdelay(1);
>>>>> }
>>>>> +
>>>>> +void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
>>>>> + const struct mx6_mmdc_calibration *calib,
>>>>> + const void *ddr_cfg)
>>>>> +{
>>>>> + if (sysinfo->ddr_type == 0) {
>>>>> + mx6_ddr3_cfg(sysinfo, calib, ddr_cfg);
>>>>> + } else {
>>>>> + puts("Unsupported ddr type\n");
>>>>> + hang();
>>>>> + }
>>>>> +}
>>>>> diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
>>>>> index 49fc9e5..e3ba140 100644
>>>>> --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
>>>>> +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
>>>>> @@ -439,7 +439,7 @@ void mx6sl_dram_iocfg(unsigned width,
>>>>> /* configure mx6 mmdc registers */
>>>>> void mx6_dram_cfg(const struct mx6_ddr_sysinfo *,
>>>>> const struct mx6_mmdc_calibration *,
>>>>> - const struct mx6_ddr3_cfg *);
>>>>> + const void *);
>>>>>
>>>>> #endif /* CONFIG_SPL_BUILD */
>>>>>
>>>>> diff --git a/board/barco/platinum/spl_picon.c b/board/barco/platinum/spl_picon.c
>>>>> index f421c21..aac0948 100644
>>>>> --- a/board/barco/platinum/spl_picon.c
>>>>> +++ b/board/barco/platinum/spl_picon.c
>>>>> @@ -137,6 +137,7 @@ static void spl_dram_init(int width)
>>>>> .bi_on = 1, /* Bank interleaving enabled */
>>>>> .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
>>>>> .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
>>>>> + .ddr_type = 0, /* DDR3 */
>>>>
>>>
>>> Seems my patches are not posted to uboot mailist successfully.
>>
>> The list was stuck over the weekend. Please wait a bit. The messages
>> start to arrive now.
>
> Seems my patch are dropped, not sure :(
>
>>
>>>> Perhaps adding an enum here would be better. You could remove the
>>>> comment then as well.
>>>>
>>>> Other than this:
>>>>
>>>> Reviewed-by: Stefan Roese <sr@denx.de>
>>>
>>> Will add your tag, and repost patch set to uboot mailist.
>>
>> And please add the enum as well.
>
> How about using macros? saying "#define MX6_DDR3 0" and "#define MX6_LPDDR2 1"?
I think enums are here more appropriate. As we don't really care about
the value. So something like this:
enum {
DDR_TYPE_DDR3,
DDR_TYPE_LPDDR2,
...
};
Thanks,
Stefan
next prev parent reply other threads:[~2015-08-17 7:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-17 3:29 [U-Boot] [PATCH 0/9] imx: mx6: support LPDDR2 and add mx6slevk spl Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 1/9] imx: mx6: ddr add more register entry for mmdc_p_regs Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 2/9] imx: mx6: ddr no support MMDC1 for i.MX6SL Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 3/9] imx: mx6: ddr correct tRFC and tXS Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 4/9] imx: mx6: ddr add dram io configuration and header file for i.MX6SL Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 5/9] imx: mx6: ddr add mpzqlp2ctl entry Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 6/9] imx: mx6: ddr add an entry ddr_type for mx6_ddr_sysinfo Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 7/9] imx: mx6: ddr init MMDC according to ddr_type Peng Fan
2015-08-17 6:54 ` Stefan Roese
2015-08-17 5:59 ` Peng Fan
2015-08-17 7:20 ` Stefan Roese
2015-08-17 6:25 ` Peng Fan
2015-08-17 7:41 ` Stefan Roese [this message]
2015-08-17 3:29 ` [U-Boot] [PATCH 8/9] imx: mx6: ddr: add LPDDR2 support Peng Fan
2015-08-17 3:29 ` [U-Boot] [PATCH 9/9] imx: mx6slevk: add SPL support Peng Fan
-- strict thread matches above, loose matches on Subject: below --
2015-08-17 8:10 [U-Boot] [PATCH 0/9] imx: mx6: support LPDDR2 and add mx6slevk spl Peng Fan
2015-08-17 8:11 ` [U-Boot] [PATCH 7/9] imx: mx6: ddr init MMDC according to ddr_type Peng Fan
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