From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Mon, 24 Aug 2015 10:02:44 +0200 Subject: [U-Boot] [PATCH 3/9] imx: mx6: ddr correct tRFC and tXS In-Reply-To: <1439799065-12278-4-git-send-email-Peng.Fan@freescale.com> References: <1439799065-12278-1-git-send-email-Peng.Fan@freescale.com> <1439799065-12278-4-git-send-email-Peng.Fan@freescale.com> Message-ID: <55DACFA4.5020302@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 17/08/2015 10:10, Peng Fan wrote: > To Chip density 4Gb, tRFC should be 300ns, see > "Table 61 ? Refresh parameters by device density" of JESD79-3E. > tXS(min) is max(5nCK, tRFC(min) + 10ns). > > Signed-off-by: Peng Fan > Cc: Stefano Babic > Cc: Tim Harvey > --- > arch/arm/cpu/armv7/mx6/ddr.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c > index 28fa3cf..3ec3e79 100644 > --- a/arch/arm/cpu/armv7/mx6/ddr.c > +++ b/arch/arm/cpu/armv7/mx6/ddr.c > @@ -357,8 +357,8 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, > txs = DIV_ROUND_UP(170000, clkper) - 1; > break; > case 4: /* 4Gb per chip */ > - trfc = DIV_ROUND_UP(260000, clkper) - 1; > - txs = DIV_ROUND_UP(270000, clkper) - 1; > + trfc = DIV_ROUND_UP(300000, clkper) - 1; > + txs = DIV_ROUND_UP(310000, clkper) - 1; > break; > case 8: /* 8Gb per chip */ > trfc = DIV_ROUND_UP(350000, clkper) - 1; > Reviewed-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================