From mboxrd@z Thu Jan 1 00:00:00 1970 From: Przemyslaw Marczak Date: Wed, 26 Aug 2015 08:53:54 +0200 Subject: [U-Boot] DWMMC crontroller in Exynos4412 In-Reply-To: <55DD5B63.4040108@samsung.com> References: <55DCBD93.5050404@uclv.cu> <55DD5B63.4040108@samsung.com> Message-ID: <55DD6282.5090607@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 08/26/2015 08:23 AM, Jaehoon Chung wrote: > On 08/26/2015 11:26 AM, Simon Glass wrote: >> +Samsung people >> >> Hi, >> >> On 25 August 2015 at 13:10, Humberto L?pez Le?n wrote: >>> Hi Simon, >>> I'm working on implementing a driver for SD/MMC cards in the framework >>> GenodeOS. I think you could help me with your experience in this type of >>> implementation in the u-boot. >>> The hardware platform on which the driver will work is a ODROID-x2 >>> (exynos4412). I use the DWMMC contoller, but I'm not sure if this is the >>> right controller to handle SD/MMC cards in Exynos4412 SoC. The SDHCI >>> controller is most appropriate? > > If you're using exynos4412 board, you can choose sdhci or dwmmc controller for eMMC, not SD/SDIO. > And in my experiment, dwmmc controller is more appropriate than sdhci.(ex, performance) > It depends which mmc channel is used. In Exynos4412, there are 5 channels, but some channel configurations shares GPIO pins: - MMC0 - sdhci - MMC1 - sdhci, or MMC0 8-bit - MMC2 - sdhci - Odroid SD card, 4-bit mode - MMC3 - sdhci - or MMC2 8-bit - MMC4 - dwmmc, uses MMC0 pins for 4-bit, and MMC0-1 for 8-bit mode Odroid is using MMC2(sdhci) and MMC0/4(sdhci or dwmmc). So for eMMC cards you can use the dwmmc, and as Jaehoon wrote it is recommended for the better performance, but for SD card you must use sdhci controller. Best regards, -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marczak at samsung.com >>> >>> Thank you for your help >> >> I'm not really sure - the compatible string for that node is: >> >> compatible = "samsung,exynos4412-dw-mshc"; >> >> which is different from what exynos5 uses. > > As i know, Some register are difference..but i know it doesn't implemented for those registers at u-boot side. > If it should be implemented for upper mode than DDR50, it needs to check the compatible. > > Best Regards, > Jaehoon Chung > >> >> Possibly Lukasz / Przemyslaw know about this. >> >> Regards, >> Simon >> _______________________________________________ >> U-Boot mailing list >> U-Boot at lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot >> > >