[U-Boot] [PATCH 39/45] arm: Remove vpac270_nor_128 board

Simon Glass
2015-08-31T01:19:33Z

This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

arch/arm/Kconfig | 6 -
board/vpac270/Kconfig | 9 --
board/vpac270/MAINTAINERS | 8 -
board/vpac270/Makefile | 13 --
board/vpac270/onenand.c | 46 ------
board/vpac270/u-boot-spl.lds | 81 ----------
board/vpac270/vpac270.c | 126 ---------------
configs/vpac270_nor_128_defconfig | 6 -
configs/vpac270_nor_256_defconfig | 6 -
configs/vpac270_ond_256_defconfig | 8 -
include/configs/vpac270.h | 325 --------------------------------------
11 files changed, 634 deletions(-)
delete mode 100644 board/vpac270/Kconfig
delete mode 100644 board/vpac270/MAINTAINERS
delete mode 100644 board/vpac270/Makefile
delete mode 100644 board/vpac270/onenand.c
delete mode 100644 board/vpac270/u-boot-spl.lds
delete mode 100644 board/vpac270/vpac270.c
delete mode 100644 configs/vpac270_nor_128_defconfig
delete mode 100644 configs/vpac270_nor_256_defconfig
delete mode 100644 configs/vpac270_ond_256_defconfig
delete mode 100644 include/configs/vpac270.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1a440b7..da58c27 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -709,11 +709,6 @@ config TARGET_PALMTREO680
select CPU_PXA
select SUPPORT_SPL

-config TARGET_VPAC270
- bool "Support vpac270"
- select CPU_PXA
- select SUPPORT_SPL
-
config TARGET_XAENIAX
bool "Support xaeniax"
select CPU_PXA
@@ -880,7 +875,6 @@ source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/toradex/colibri_vf/Kconfig"
source "board/udoo/Kconfig"
-source "board/vpac270/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/wandboard/Kconfig"
source "board/warp/Kconfig"
diff --git a/board/vpac270/Kconfig b/board/vpac270/Kconfig
deleted file mode 100644
index 1701b35..0000000
--- a/board/vpac270/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_VPAC270
-
-config SYS_BOARD
- default "vpac270"
-
-config SYS_CONFIG_NAME
- default "vpac270"
-
-endif
diff --git a/board/vpac270/MAINTAINERS b/board/vpac270/MAINTAINERS
deleted file mode 100644
index 1c62765..0000000
--- a/board/vpac270/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-VPAC270 BOARD
-M: Marek Vasut <marek.vasut@gmail.com>
-S: Maintained
-F: board/vpac270/
-F: include/configs/vpac270.h
-F: configs/vpac270_nor_128_defconfig
-F: configs/vpac270_nor_256_defconfig
-F: configs/vpac270_ond_256_defconfig
diff --git a/board/vpac270/Makefile b/board/vpac270/Makefile
deleted file mode 100644
index ad7f7d8..0000000
--- a/board/vpac270/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Voipac PXA270 Support
-#
-# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-ifndef CONFIG_SPL_BUILD
-obj-y := vpac270.o
-else
-obj-y := onenand.o
-endif
diff --git a/board/vpac270/onenand.c b/board/vpac270/onenand.c
deleted file mode 100644
index a749b31..0000000
--- a/board/vpac270/onenand.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Voipac PXA270 OneNAND SPL
- *
- * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/io.h>
-#include <onenand_uboot.h>
-#include <asm/arch/pxa.h>
-
-void board_init_f(unsigned long unused)
-{
- extern uint32_t _end;
- uint32_t tmp;
-
- asm volatile("mov %0, pc" : "=r"(tmp));
- tmp >>= 24;
-
- /* The code runs from OneNAND RAM, copy SPL to SRAM and execute it. */
- if (tmp == 0) {
- tmp = (uint32_t)&_end - CONFIG_SPL_TEXT_BASE;
- onenand_spl_load_image(0, tmp, (void *)CONFIG_SPL_TEXT_BASE);
- asm volatile("mov pc, %0" : : "r"(CONFIG_SPL_TEXT_BASE));
- }
-
- /* Hereby, the code runs from (S)RAM, copy U-Boot and execute it. */
- arch_cpu_init();
- pxa2xx_dram_init();
- onenand_spl_load_image(CONFIG_SPL_ONENAND_LOAD_ADDR,
- CONFIG_SPL_ONENAND_LOAD_SIZE,
- (void *)CONFIG_SYS_TEXT_BASE);
- asm volatile("mov pc, %0" : : "r"(CONFIG_SYS_TEXT_BASE));
-
- for (;;)
- ;
-}
-
-void __attribute__((noreturn)) hang(void)
-{
- for (;;)
- ;
-}
diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds
deleted file mode 100644
index 954afb9..0000000
--- a/board/vpac270/u-boot-spl.lds
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
- * on behalf of DENX Software Engineering GmbH
- *
- * January 2004 - Changed to support H4 device
- * Copyright (c) 2004-2008 Texas Instruments
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = CONFIG_SPL_TEXT_BASE;
- .text.0 :
- {
- *(.vectors)
- arch/arm/cpu/pxa/start.o (.text*)
- arch/arm/lib/built-in.o (.text*)
- board/vpac270/built-in.o (.text*)
- drivers/built-in.o (.text*)
- }
-
-
- /* Start of the rest of the SPL */
- . = CONFIG_SPL_TEXT_BASE + 0x800;
-
- .text.1 :
- {
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
-
- . = ALIGN(4);
-
- __image_copy_end = .;
-
- .rel.dyn : {
- __rel_dyn_start = .;
- *(.rel*)
- __rel_dyn_end = .;
- }
-
- . = ALIGN(0x800);
-
- .end :
- {
- *(.__end)
- }
-
- _image_binary_end = .;
-
- .bss __rel_dyn_start (OVERLAY) : {
- __bss_start = .;
- *(.bss*)
- . = ALIGN(4);
- __bss_end = .;
- }
-
- .dynsym _image_binary_end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/vpac270/vpac270.c b/board/vpac270/vpac270.c
deleted file mode 100644
index 8d777df..0000000
--- a/board/vpac270/vpac270.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Voipac PXA270 Support
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/regs-mmc.h>
-#include <asm/arch/pxa.h>
-#include <netdev.h>
-#include <serial.h>
-#include <asm/io.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int board_init(void)
-{
- /* We have RAM, disable cache */
- dcache_disable();
- icache_disable();
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* Arch number of vpac270 */
- gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int dram_init(void)
-{
-#ifndef CONFIG_ONENAND
- pxa2xx_dram_init();
-#endif
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-#ifdef CONFIG_RAM_256M
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
-}
-
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
-{
- pxa_mmc_register(0);
- return 0;
-}
-#endif
-
-#ifdef CONFIG_CMD_USB
-int board_usb_init(int index, enum usb_init_type init)
-{
- writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
- ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
- UHCHR);
-
- writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
-
- while (readl(UHCHR) & UHCHR_FSBIR)
- ;
-
- writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
- writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
-
- /* Clear any OTG Pin Hold */
- if (readl(PSSR) & PSSR_OTGPH)
- writel(readl(PSSR) | PSSR_OTGPH, PSSR);
-
- writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
- writel(readl(UHCRHDA) | 0x100, UHCRHDA);
-
- /* Set port power control mask bits, only 3 ports. */
- writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
-
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
- UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-
-void usb_board_stop(void)
-{
- writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
- udelay(11);
- writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
-
- writel(readl(UHCCOMS) | 1, UHCCOMS);
- udelay(10);
-
- writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
-
- return;
-}
-#endif
-
-#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
-{
- return dm9000_initialize(bis);
-}
-#endif
diff --git a/configs/vpac270_nor_128_defconfig b/configs/vpac270_nor_128_defconfig
deleted file mode 100644
index 1d11653..0000000
--- a/configs/vpac270_nor_128_defconfig
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_VPAC270=y
-CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_128M"
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_PROMPT="$ "
diff --git a/configs/vpac270_nor_256_defconfig b/configs/vpac270_nor_256_defconfig
deleted file mode 100644
index bcd1006..0000000
--- a/configs/vpac270_nor_256_defconfig
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_VPAC270=y
-CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_256M"
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_PROMPT="$ "
diff --git a/configs/vpac270_ond_256_defconfig b/configs/vpac270_ond_256_defconfig
deleted file mode 100644
index d989819..0000000
--- a/configs/vpac270_ond_256_defconfig
+++ /dev/null
@@ -1,8 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_VPAC270=y
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="ONENAND,RAM_256M"
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_PROMPT="$ "
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
deleted file mode 100644
index 976ba5d..0000000
--- a/include/configs/vpac270.h
+++ /dev/null
@@ -1,325 +0,0 @@
-/*
- * Voipac PXA270 configuration file
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Board Configuration Options
- */
-#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
-#define CONFIG_VPAC270 1 /* Voipac PXA270 board */
-#define CONFIG_SYS_TEXT_BASE 0xa0000000
-
-#ifdef CONFIG_ONENAND
-#define CONFIG_SPL_ONENAND_SUPPORT
-#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
-#define CONFIG_SPL_ONENAND_LOAD_SIZE \
- (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
-#define CONFIG_SPL_TEXT_BASE 0x5c000000
-#define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds"
-#endif
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_MALLOC_LEN (128*1024)
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_BOOTCOMMAND \
- "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \
- "bootm 0xa4000000; " \
- "fi; " \
- "if usb reset && fatload usb 0 0xa4000000 uImage; then " \
- "bootm 0xa4000000; " \
- "fi; " \
- "if ide reset && fatload ide 0 0xa4000000 uImage; then " \
- "bootm 0xa4000000; " \
- "fi; " \
- "bootm 0x60000;"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "update_onenand=" \
- "onenand erase 0x0 0x80000 ; " \
- "onenand write 0xa0000000 0x0 0x80000"
-
-#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
-#define CONFIG_TIMESTAMP
-#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_LZMA /* LZMA compression support */
-#define CONFIG_OF_LIBFDT
-
-/*
- * Serial Console Configuration
- */
-#define CONFIG_PXA_SERIAL
-#define CONFIG_FFUART 1
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Bootloader Components Configuration
- */
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_USB
-#undef CONFIG_LCD
-#define CONFIG_CMD_IDE
-
-#ifdef CONFIG_ONENAND
-#define CONFIG_CMD_ONENAND
-#else
-#undef CONFIG_CMD_ONENAND
-#endif
-
-/*
- * Networking Configuration
- * chip on the Voipac PXA270 board
- */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-
-#define CONFIG_DRIVER_DM9000 1
-#define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
-#define DM9000_IO (CONFIG_DM9000_BASE)
-#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
-#define CONFIG_NET_RETRY_COUNT 10
-
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#endif
-
-/*
- * MMC Card Configuration
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_PXA_MMC_GENERIC
-#define CONFIG_SYS_MMC_BASE 0xF0000000
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_DOS_PARTITION
-#endif
-
-/*
- * KGDB
- */
-#ifdef CONFIG_CMD_KGDB
-#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
-#endif
-
-/*
- * HUSH Shell Configuration
- */
-#define CONFIG_SYS_HUSH_PARSER 1
-
-#define CONFIG_SYS_LONGHELP
-#ifdef CONFIG_SYS_HUSH_PARSER
-#else
-#endif
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_DEVICE_NULLDEV 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE 1
-
-/*
- * Clock Configuration
- */
-#define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
-
-
-/*
- * DRAM Map
- */
-#define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
-
-#ifdef CONFIG_RAM_256M
-#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */
-#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#endif
-
-#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
-#ifdef CONFIG_RAM_256M
-#define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */
-#else
-#define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
-#endif
-
-#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
-
-/*
- * NOR FLASH
- */
-#define CONFIG_SYS_MONITOR_BASE 0x0
-#define CONFIG_SYS_MONITOR_LEN 0x80000
-#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_ENV_SIZE 0x20000
-#define CONFIG_ENV_SECT_SIZE 0x20000
-
-#if defined(CONFIG_CMD_FLASH) /* NOR */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-
-#ifdef CONFIG_RAM_256M
-#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
-#endif
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER 1
-
-#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
-#ifdef CONFIG_RAM_256M
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
-#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
-#else
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#endif
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
-
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_PROTECTION 1
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-#elif defined(CONFIG_CMD_ONENAND) /* OneNAND */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ONENAND_BASE 0x00000000
-
-#define CONFIG_ENV_IS_IN_ONENAND 1
-
-#else /* No flash */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_NOWHERE
-#endif
-
-/*
- * IDE
- */
-#ifdef CONFIG_CMD_IDE
-#define CONFIG_LBA48
-#undef CONFIG_IDE_LED
-#undef CONFIG_IDE_RESET
-
-#define __io
-
-#define CONFIG_SYS_IDE_MAXBUS 1
-#define CONFIG_SYS_IDE_MAXDEVICE 1
-
-#define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
-
-#define CONFIG_SYS_ATA_DATA_OFFSET 0x120
-#define CONFIG_SYS_ATA_REG_OFFSET 0x120
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x120
-
-#define CONFIG_SYS_ATA_STRIDE 2
-#endif
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GPSR0_VAL 0x01308800
-#define CONFIG_SYS_GPSR1_VAL 0x00cf0000
-#define CONFIG_SYS_GPSR2_VAL 0x922ac000
-#define CONFIG_SYS_GPSR3_VAL 0x0161e800
-
-#define CONFIG_SYS_GPCR0_VAL 0x00010000
-#define CONFIG_SYS_GPCR1_VAL 0x0
-#define CONFIG_SYS_GPCR2_VAL 0x0
-#define CONFIG_SYS_GPCR3_VAL 0x0
-
-#define CONFIG_SYS_GPDR0_VAL 0xcbb18800
-#define CONFIG_SYS_GPDR1_VAL 0xfccfa981
-#define CONFIG_SYS_GPDR2_VAL 0x922affff
-#define CONFIG_SYS_GPDR3_VAL 0x0161e904
-
-#define CONFIG_SYS_GAFR0_L_VAL 0x00100000
-#define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510
-#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
-#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa
-#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
-#define CONFIG_SYS_GAFR2_U_VAL 0x4109a401
-#define CONFIG_SYS_GAFR3_L_VAL 0x54010310
-#define CONFIG_SYS_GAFR3_U_VAL 0x00025401
-
-#define CONFIG_SYS_PSSR_VAL 0x30
-
-/*
- * Clock settings
- */
-#define CONFIG_SYS_CKEN 0x00500240
-#define CONFIG_SYS_CCCR 0x02000290
-
-/*
- * Memory settings
- */
-#define CONFIG_SYS_MSC0_VAL 0x3ffc95f9
-#define CONFIG_SYS_MSC1_VAL 0x02ccf974
-#define CONFIG_SYS_MSC2_VAL 0x00000000
-#ifdef CONFIG_RAM_256M
-#define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3
-#else
-#define CONFIG_SYS_MDCNFG_VAL 0x88000ad3
-#endif
-#define CONFIG_SYS_MDREFR_VAL 0x201fe01e
-#define CONFIG_SYS_MDMRS_VAL 0x00000000
-#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
-#define CONFIG_SYS_SXCNFG_VAL 0x40044004
-
-/*
- * PCMCIA and CF Interfaces
- */
-#define CONFIG_SYS_MECR_VAL 0x00000001
-#define CONFIG_SYS_MCMEM0_VAL 0x00014307
-#define CONFIG_SYS_MCMEM1_VAL 0x00014307
-#define CONFIG_SYS_MCATT0_VAL 0x0001c787
-#define CONFIG_SYS_MCATT1_VAL 0x0001c787
-#define CONFIG_SYS_MCIO0_VAL 0x0001430f
-#define CONFIG_SYS_MCIO1_VAL 0x0001430f
-
-/*
- * LCD
- */
-#ifdef CONFIG_LCD
-#define CONFIG_VOIPAC_LCD
-#endif
-
-/*
- * USB
- */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_BOARD_INIT
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270"
-#define CONFIG_USB_STORAGE
-#endif
-
-#endif /* __CONFIG_H */
--
2.5.0.457.gab17608