[U-Boot] [PATCH 41/45] arm: Remove omap3_evm board

Felipe Balbi
2015-08-31T14:50:57Z

On Sun, Aug 30, 2015 at 07:19:35PM -0600, Simon Glass wrote:
> This board has not been converted to generic board by the deadline.
> Remove it.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>

I have a feeling people still this too.

> ---
>
> arch/arm/cpu/armv7/omap3/Kconfig | 13 --
> board/quipos/cairo/cairo.c | 12 -
> board/ti/evm/Kconfig | 38 ----
> board/ti/evm/MAINTAINERS | 10 -
> board/ti/evm/Makefile | 8 -
> board/ti/evm/evm.c | 274 -----------------------
> board/ti/evm/evm.h | 394 ---------------------------------
> configs/omap3_evm_defconfig | 10 -
> configs/omap3_evm_quick_mmc_defconfig | 26 ---
> configs/omap3_evm_quick_nand_defconfig | 26 ---
> doc/README.omap3 | 5 -
> drivers/usb/musb/omap3.c | 4 -
> drivers/usb/musb/omap3.h | 4 -
> include/configs/omap3_evm.h | 154 -------------
> include/configs/omap3_evm_common.h | 289 ------------------------
> include/configs/omap3_evm_quick_mmc.h | 92 --------
> include/configs/omap3_evm_quick_nand.h | 92 --------
> 17 files changed, 1451 deletions(-)
> delete mode 100644 board/ti/evm/Kconfig
> delete mode 100644 board/ti/evm/MAINTAINERS
> delete mode 100644 board/ti/evm/Makefile
> delete mode 100644 board/ti/evm/evm.c
> delete mode 100644 board/ti/evm/evm.h
> delete mode 100644 configs/omap3_evm_defconfig
> delete mode 100644 configs/omap3_evm_quick_mmc_defconfig
> delete mode 100644 configs/omap3_evm_quick_nand_defconfig
> delete mode 100644 include/configs/omap3_evm.h
> delete mode 100644 include/configs/omap3_evm_common.h
> delete mode 100644 include/configs/omap3_evm_quick_mmc.h
> delete mode 100644 include/configs/omap3_evm_quick_nand.h
>
> diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
> index c758038..408bb76 100644
> --- a/arch/arm/cpu/armv7/omap3/Kconfig
> +++ b/arch/arm/cpu/armv7/omap3/Kconfig
> @@ -33,18 +33,6 @@ config TARGET_DEVKIT8000
> select DM_SERIAL
> select DM_GPIO
>
> -config TARGET_OMAP3_EVM
> - bool "TI OMAP3 EVM"
> - select SUPPORT_SPL
> -
> -config TARGET_OMAP3_EVM_QUICK_MMC
> - bool "TI OMAP3 EVM Quick MMC"
> - select SUPPORT_SPL
> -
> -config TARGET_OMAP3_EVM_QUICK_NAND
> - bool "TI OMAP3 EVM Quick NAND"
> - select SUPPORT_SPL
> -
> config TARGET_OMAP3_IGEP00X0
> bool "IGEP"
> select SUPPORT_SPL
> @@ -120,7 +108,6 @@ source "board/ti/beagle/Kconfig"
> source "board/compulab/cm_t35/Kconfig"
> source "board/compulab/cm_t3517/Kconfig"
> source "board/timll/devkit8000/Kconfig"
> -source "board/ti/evm/Kconfig"
> source "board/isee/igep00x0/Kconfig"
> source "board/overo/Kconfig"
> source "board/logicpd/zoom1/Kconfig"
> diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c
> index b97a09a..083e19a 100644
> --- a/board/quipos/cairo/cairo.c
> +++ b/board/quipos/cairo/cairo.c
> @@ -26,18 +26,6 @@
> DECLARE_GLOBAL_DATA_PTR;
>
> /*
> - * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
> - */
> -u8 omap3_evm_need_extvbus(void)
> -{
> - u8 retval = 0;
> -
> - /* TODO: verify if cairo handheld platform needs extvbus programming */
> -
> - return retval;
> -}
> -
> -/*
> * Routine: board_init
> * Description: Early hardware init.
> */
> diff --git a/board/ti/evm/Kconfig b/board/ti/evm/Kconfig
> deleted file mode 100644
> index f02aa31..0000000
> --- a/board/ti/evm/Kconfig
> +++ /dev/null
> @@ -1,38 +0,0 @@
> -if TARGET_OMAP3_EVM
> -
> -config SYS_BOARD
> - default "evm"
> -
> -config SYS_VENDOR
> - default "ti"
> -
> -config SYS_CONFIG_NAME
> - default "omap3_evm"
> -
> -endif
> -
> -if TARGET_OMAP3_EVM_QUICK_MMC
> -
> -config SYS_BOARD
> - default "evm"
> -
> -config SYS_VENDOR
> - default "ti"
> -
> -config SYS_CONFIG_NAME
> - default "omap3_evm_quick_mmc"
> -
> -endif
> -
> -if TARGET_OMAP3_EVM_QUICK_NAND
> -
> -config SYS_BOARD
> - default "evm"
> -
> -config SYS_VENDOR
> - default "ti"
> -
> -config SYS_CONFIG_NAME
> - default "omap3_evm_quick_nand"
> -
> -endif
> diff --git a/board/ti/evm/MAINTAINERS b/board/ti/evm/MAINTAINERS
> deleted file mode 100644
> index 90c3f6b..0000000
> --- a/board/ti/evm/MAINTAINERS
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -EVM BOARD
> -M: Tom Rini <trini@konsulko.com>
> -S: Maintained
> -F: board/ti/evm/
> -F: include/configs/omap3_evm.h
> -F: include/configs/omap3_evm_quick_mmc.h
> -F: include/configs/omap3_evm_quick_nand.h
> -F: configs/omap3_evm_defconfig
> -F: configs/omap3_evm_quick_mmc_defconfig
> -F: configs/omap3_evm_quick_nand_defconfig
> diff --git a/board/ti/evm/Makefile b/board/ti/evm/Makefile
> deleted file mode 100644
> index b88ab8f..0000000
> --- a/board/ti/evm/Makefile
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -#
> -# (C) Copyright 2000, 2001, 2002
> -# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> -#
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -
> -obj-y := evm.o
> diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
> deleted file mode 100644
> index 3f93d9c..0000000
> --- a/board/ti/evm/evm.c
> +++ /dev/null
> @@ -1,274 +0,0 @@
> -/*
> - * (C) Copyright 2004-2011
> - * Texas Instruments, <www.ti.com>
> - *
> - * Author :
> - * Manikandan Pillai <mani.pillai@ti.com>
> - *
> - * Derived from Beagle Board and 3430 SDP code by
> - * Richard Woodruff <r-woodruff2@ti.com>
> - * Syed Mohammed Khasim <khasim@ti.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -#include <common.h>
> -#include <netdev.h>
> -#include <asm/io.h>
> -#include <asm/arch/mem.h>
> -#include <asm/arch/mux.h>
> -#include <asm/arch/sys_proto.h>
> -#include <asm/arch/mmc_host_def.h>
> -#include <asm/gpio.h>
> -#include <i2c.h>
> -#include <twl4030.h>
> -#include <asm/mach-types.h>
> -#include <linux/mtd/nand.h>
> -#include "evm.h"
> -
> -#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
> -#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -static u32 omap3_evm_version;
> -
> -u32 get_omap3_evm_rev(void)
> -{
> - return omap3_evm_version;
> -}
> -
> -static void omap3_evm_get_revision(void)
> -{
> -#if defined(CONFIG_CMD_NET)
> - /*
> - * Board revision can be ascertained only by identifying
> - * the Ethernet chipset.
> - */
> - unsigned int smsc_id;
> -
> - /* Ethernet PHY ID is stored at ID_REV register */
> - smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
> - printf("Read back SMSC id 0x%x\n", smsc_id);
> -
> - switch (smsc_id) {
> - /* SMSC9115 chipset */
> - case 0x01150000:
> - omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
> - break;
> - /* SMSC 9220 chipset */
> - case 0x92200000:
> - default:
> - omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
> - }
> -#else
> -#if defined(CONFIG_STATIC_BOARD_REV)
> - /*
> - * Look for static defintion of the board revision
> - */
> - omap3_evm_version = CONFIG_STATIC_BOARD_REV;
> -#else
> - /*
> - * Fallback to the default above.
> - */
> - omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
> -#endif
> -#endif /* CONFIG_CMD_NET */
> -}
> -
> -#ifdef CONFIG_USB_OMAP3
> -/*
> - * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
> - */
> -u8 omap3_evm_need_extvbus(void)
> -{
> - u8 retval = 0;
> -
> - if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
> - retval = 1;
> -
> - return retval;
> -}
> -#endif
> -
> -/*
> - * Routine: board_init
> - * Description: Early hardware init.
> - */
> -int board_init(void)
> -{
> - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
> - /* board id for Linux */
> - gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
> - /* boot param addr */
> - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
> -
> - return 0;
> -}
> -
> -#ifdef CONFIG_SPL_BUILD
> -/*
> - * Routine: get_board_mem_timings
> - * Description: If we use SPL then there is no x-loader nor config header
> - * so we have to setup the DDR timings ourself on the first bank. This
> - * provides the timing values back to the function that configures
> - * the memory.
> - */
> -void get_board_mem_timings(struct board_sdrc_timings *timings)
> -{
> - int pop_mfr, pop_id;
> -
> - /*
> - * We need to identify what PoP memory is on the board so that
> - * we know what timings to use. To map the ID values please see
> - * nand_ids.c
> - */
> - identify_nand_chip(&pop_mfr, &pop_id);
> -
> - if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
> - /* 256MB DDR */
> - timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
> - timings->ctrla = HYNIX_V_ACTIMA_200;
> - timings->ctrlb = HYNIX_V_ACTIMB_200;
> - } else {
> - /* 128MB DDR */
> - timings->mcfg = MICRON_V_MCFG_165(128 << 20);
> - timings->ctrla = MICRON_V_ACTIMA_165;
> - timings->ctrlb = MICRON_V_ACTIMB_165;
> - }
> - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
> - timings->mr = MICRON_V_MR_165;
> -}
> -#endif
> -
> -/*
> - * Routine: misc_init_r
> - * Description: Init ethernet (done here so udelay works)
> - */
> -int misc_init_r(void)
> -{
> -
> -#ifdef CONFIG_SYS_I2C_OMAP34XX
> - i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
> -#endif
> -
> -#if defined(CONFIG_CMD_NET)
> - setup_net_chip();
> -#endif
> - omap3_evm_get_revision();
> -
> -#if defined(CONFIG_CMD_NET)
> - reset_net_chip();
> -#endif
> - dieid_num_r();
> -
> - return 0;
> -}
> -
> -/*
> - * Routine: set_muxconf_regs
> - * Description: Setting up the configuration Mux registers specific to the
> - * hardware. Many pins need to be moved from protect to primary
> - * mode.
> - */
> -void set_muxconf_regs(void)
> -{
> - MUX_EVM();
> -}
> -
> -#ifdef CONFIG_CMD_NET
> -/*
> - * Routine: setup_net_chip
> - * Description: Setting up the configuration GPMC registers specific to the
> - * Ethernet hardware.
> - */
> -static void setup_net_chip(void)
> -{
> - struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
> -
> - /* Configure GPMC registers */
> - writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
> - writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
> - writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
> - writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
> - writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
> - writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
> - writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
> -
> - /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
> - writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
> - /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
> - writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
> - /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
> - writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
> - &ctrl_base->gpmc_nadv_ale);
> -}
> -
> -/**
> - * Reset the ethernet chip.
> - */
> -static void reset_net_chip(void)
> -{
> - int ret;
> - int rst_gpio;
> -
> - if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
> - rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
> - } else {
> - rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
> - }
> -
> - ret = gpio_request(rst_gpio, "");
> - if (ret < 0) {
> - printf("Unable to get GPIO %d\n", rst_gpio);
> - return ;
> - }
> -
> - /* Configure as output */
> - gpio_direction_output(rst_gpio, 0);
> -
> - /* Send a pulse on the GPIO pin */
> - gpio_set_value(rst_gpio, 1);
> - udelay(1);
> - gpio_set_value(rst_gpio, 0);
> - udelay(1);
> - gpio_set_value(rst_gpio, 1);
> -}
> -
> -int board_eth_init(bd_t *bis)
> -{
> - int rc = 0;
> -#ifdef CONFIG_SMC911X
> -#define STR_ENV_ETHADDR "ethaddr"
> -
> - struct eth_device *dev;
> - uchar eth_addr[6];
> -
> - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
> -
> - if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
> - dev = eth_get_dev_by_index(0);
> - if (dev) {
> - eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
> - } else {
> - printf("omap3evm: Couldn't get eth device\n");
> - rc = -1;
> - }
> - }
> -#endif
> - return rc;
> -}
> -#endif /* CONFIG_CMD_NET */
> -
> -#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
> -int board_mmc_init(bd_t *bis)
> -{
> - return omap_mmc_init(0, 0, 0, -1, -1);
> -}
> -#endif
> -
> -#if defined(CONFIG_GENERIC_MMC)
> -void board_mmc_power_init(void)
> -{
> - twl4030_power_mmc_init(0);
> -}
> -#endif
> diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
> deleted file mode 100644
> index 91e9b88..0000000
> --- a/board/ti/evm/evm.h
> +++ /dev/null
> @@ -1,394 +0,0 @@
> -/*
> - * (C) Copyright 2008
> - * Nishanth Menon <menon.nishanth@gmail.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -#ifndef _EVM_H_
> -#define _EVM_H_
> -
> -const omap3_sysinfo sysinfo = {
> - DDR_DISCRETE,
> - "OMAP3 EVM board",
> -#if defined(CONFIG_ENV_IS_IN_ONENAND)
> - "OneNAND",
> -#else
> - "NAND",
> -#endif
> -};
> -
> -/*
> - * OMAP35x EVM revision
> - * Run time detection of EVM revision is done by reading Ethernet
> - * PHY ID -
> - * GEN_1 = 0x01150000
> - * GEN_2 = 0x92200000
> - */
> -enum {
> - OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
> - OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
> -};
> -
> -u32 get_omap3_evm_rev(void);
> -
> -#if defined(CONFIG_CMD_NET)
> -static void setup_net_chip(void);
> -static void reset_net_chip(void);
> -#endif
> -
> -/*
> - * IEN - Input Enable
> - * IDIS - Input Disable
> - * PTD - Pull type Down
> - * PTU - Pull type Up
> - * DIS - Pull type selection is inactive
> - * EN - Pull type selection is active
> - * M0 - Mode 0
> - * The commented string gives the final mux configuration for that pin
> - */
> -#define MUX_EVM() \
> - /*SDRC*/\
> - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
> - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
> - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
> - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
> - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
> - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
> - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
> - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
> - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
> - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
> - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
> - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
> - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
> - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
> - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
> - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
> - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
> - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
> - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
> - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
> - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\
> - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\
> - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\
> - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\
> - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\
> - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\
> - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\
> - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\
> - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\
> - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\
> - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\
> - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\
> - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\
> - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\
> - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\
> - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
> - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
> - /*GPMC*/\
> - MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\
> - MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\
> - MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\
> - MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\
> - MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\
> - MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\
> - MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\
> - MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\
> - MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\
> - MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\
> - MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\
> - MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\
> - MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\
> - MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\
> - MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\
> - MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\
> - MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\
> - MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\
> - MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\
> - MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\
> - MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\
> - MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\
> - MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\
> - MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\
> - MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\
> - MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\
> - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
> - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
> - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
> - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
> - MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)) /*GPMC_nCS4*/\
> - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
> - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\
> - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\
> - MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
> - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
> - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
> - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
> - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) /*GPMC_nBE0_CLE*/\
> - MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) /*GPMC_nBE1*/\
> - MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
> - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
> - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
> - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
> - /* - ETH_nRESET*/\
> - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\
> - /*DSS*/\
> - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
> - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
> - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
> - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
> - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
> - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
> - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
> - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
> - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
> - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
> - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
> - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
> - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
> - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
> - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
> - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
> - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
> - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
> - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
> - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
> - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
> - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
> - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
> - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
> - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
> - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
> - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
> - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
> - /*CAMERA*/\
> - MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\
> - MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\
> - MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
> - MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\
> - MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\
> - /* - CAM_RESET*/\
> - MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\
> - MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\
> - MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\
> - MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\
> - MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\
> - MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\
> - MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\
> - MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\
> - MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\
> - MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\
> - MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\
> - MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\
> - MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
> - MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\
> - MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
> - MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\
> - MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\
> - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\
> - MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\
> - /*Audio Interface */\
> - MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
> - MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\
> - MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\
> - MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
> - /*Expansion card */\
> - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
> - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
> - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
> - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
> - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
> - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
> - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\
> - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\
> - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\
> - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\
> - /*Wireless LAN */\
> - MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)) /*MMC2_CLK*/\
> - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\
> - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\
> - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\
> - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\
> - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\
> - MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M0)) /*MMC2_DAT4*/\
> - MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M0)) /*MMC2_DAT5*/\
> - MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M0)) /*MMC2_DAT6 */\
> - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)) /*MMC2_DAT7*/\
> - /*Bluetooth*/\
> - MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
> - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
> - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX */\
> - MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\
> - MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\
> - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
> - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
> - MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /*UART2_RX*/\
> - /*Modem Interface */\
> - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
> - MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
> - MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\
> - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
> - MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_152*/\
> - /* - LCD_INI*/\
> - MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\
> - /* - LCD_ENVDD */\
> - MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\
> - /* - LCD_QVGA/nVGA */\
> - MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_155*/\
> - /* - LCD_RESB */\
> - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKR */\
> - MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) /*MCBSP1_FSR*/\
> - MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) /*MCBSP1_DX*/\
> - MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) /*MCBSP1_DR*/\
> - MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*MCBSP_CLKS */\
> - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*MCBSP1_FSX*/\
> - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKX */\
> - /*Serial Interface*/\
> - MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_*/\
> - /* RCTX*/\
> - MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\
> - MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\
> - MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
> - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\
> - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
> - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
> - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
> - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\
> - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\
> - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\
> - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\
> - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\
> - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\
> - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\
> - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\
> - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\
> - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\
> - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\
> - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\
> - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\
> - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
> - MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
> - MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
> - MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO*/\
> - MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
> - MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
> - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
> - MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
> - MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\
> - /* TS_PEN_IRQ */\
> - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\
> - /* - LAN_INTR*/\
> - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\
> - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
> - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\
> - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\
> - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\
> - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\
> - /*Control and debug */\
> - MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
> - MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
> - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\
> - MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\
> - /* - PEN_IRQ */\
> - MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\
> - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\
> - MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\
> - MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\
> - MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\
> - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\
> - /* - VIO_1V8*/\
> - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\
> - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\
> - MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) /*SYS_CLKOUT2*/\
> - MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)) /*JTAG_NTRST*/\
> - MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\
> - MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\
> - MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\
> - MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\
> - MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\
> - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)) /*ETK_CLK*/\
> - MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)) /*ETK_CTL*/\
> - MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D0*/\
> - MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D1*/\
> - MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | EN | M0)) /*ETK_D2*/\
> - MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D3*/\
> - MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D4*/\
> - MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D5*/\
> - MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D6*/\
> - MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\
> - MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\
> - MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\
> - MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\
> - MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\
> - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\
> - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\
> - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\
> - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\
> - /*Die to Die */\
> - MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
> - MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
> - MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\
> - MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\
> - MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\
> - MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\
> - MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\
> - MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\
> - MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\
> - MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\
> - MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\
> - MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\
> - MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\
> - MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\
> - MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\
> - MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\
> - MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\
> - MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\
> - MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\
> - MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\
> - MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\
> - MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\
> - MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\
> - MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\
> - MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\
> - MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\
> - MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\
> - MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\
> - MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\
> - MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\
> - MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\
> - MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\
> - MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\
> - MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\
> - MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\
> - MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\
> - MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\
> - MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\
> - MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\
> - MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
> - MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
> - MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\
> - MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\
> - MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\
> - MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\
> - MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\
> - MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\
> - MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\
> - MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
> - MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
> - MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
> - MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
> - MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\
> - MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\
> - MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\
> - MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\
> - MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\
> - MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
> - MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
> - MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
> - MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
> - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\
> - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\
> - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
> - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/\
> -
> -#endif
> diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
> deleted file mode 100644
> index de8fbd9..0000000
> --- a/configs/omap3_evm_defconfig
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_OMAP34XX=y
> -CONFIG_TARGET_OMAP3_EVM=y
> -CONFIG_SPL=y
> -# CONFIG_CMD_IMI is not set
> -# CONFIG_CMD_IMLS is not set
> -# CONFIG_CMD_FLASH is not set
> -# CONFIG_CMD_FPGA is not set
> -# CONFIG_CMD_SETEXPR is not set
> -CONFIG_SYS_PROMPT="OMAP3_EVM # "
> diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig
> deleted file mode 100644
> index 7d15b16..0000000
> --- a/configs/omap3_evm_quick_mmc_defconfig
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_OMAP34XX=y
> -CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y
> -CONFIG_SPL=y
> -# CONFIG_CMD_BDI is not set
> -# CONFIG_CMD_CONSOLE is not set
> -# CONFIG_CMD_BOOTD is not set
> -# CONFIG_CMD_RUN is not set
> -# CONFIG_CMD_IMI is not set
> -# CONFIG_CMD_IMLS is not set
> -# CONFIG_CMD_XIMG is not set
> -# CONFIG_CMD_EDITENV is not set
> -# CONFIG_CMD_SAVEENV is not set
> -# CONFIG_CMD_ENV_EXISTS is not set
> -# CONFIG_CMD_MEMORY is not set
> -# CONFIG_CMD_LOADB is not set
> -# CONFIG_CMD_LOADS is not set
> -# CONFIG_CMD_FLASH is not set
> -# CONFIG_CMD_FPGA is not set
> -# CONFIG_CMD_ECHO is not set
> -# CONFIG_CMD_ITEST is not set
> -# CONFIG_CMD_SOURCE is not set
> -# CONFIG_CMD_SETEXPR is not set
> -# CONFIG_CMD_NFS is not set
> -# CONFIG_CMD_MISC is not set
> -CONFIG_SYS_PROMPT="OMAP3_EVM # "
> diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig
> deleted file mode 100644
> index cd30134..0000000
> --- a/configs/omap3_evm_quick_nand_defconfig
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_OMAP34XX=y
> -CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y
> -CONFIG_SPL=y
> -# CONFIG_CMD_BDI is not set
> -# CONFIG_CMD_CONSOLE is not set
> -# CONFIG_CMD_BOOTD is not set
> -# CONFIG_CMD_RUN is not set
> -# CONFIG_CMD_IMI is not set
> -# CONFIG_CMD_IMLS is not set
> -# CONFIG_CMD_XIMG is not set
> -# CONFIG_CMD_EDITENV is not set
> -# CONFIG_CMD_SAVEENV is not set
> -# CONFIG_CMD_ENV_EXISTS is not set
> -# CONFIG_CMD_MEMORY is not set
> -# CONFIG_CMD_LOADB is not set
> -# CONFIG_CMD_LOADS is not set
> -# CONFIG_CMD_FLASH is not set
> -# CONFIG_CMD_FPGA is not set
> -# CONFIG_CMD_ECHO is not set
> -# CONFIG_CMD_ITEST is not set
> -# CONFIG_CMD_SOURCE is not set
> -# CONFIG_CMD_SETEXPR is not set
> -# CONFIG_CMD_NFS is not set
> -# CONFIG_CMD_MISC is not set
> -CONFIG_SYS_PROMPT="OMAP3_EVM # "
> diff --git a/doc/README.omap3 b/doc/README.omap3
> index e09ac03..d692374 100644
> --- a/doc/README.omap3
> +++ b/doc/README.omap3
> @@ -43,11 +43,6 @@ make
> make omap3_overo_config
> make
>
> -* TI EVM:
> -
> -make omap3_evm_config
> -make
> -
> * Pandora:
>
> make omap3_pandora_config
> diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
> index 97da529..a61affc 100644
> --- a/drivers/usb/musb/omap3.c
> +++ b/drivers/usb/musb/omap3.c
> @@ -118,10 +118,6 @@ int musb_platform_init(void)
> stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY;
> writel(stdby, &otg->forcestdby);
>
> -#ifdef CONFIG_OMAP3_EVM
> - musb_cfg.extvbus = omap3_evm_need_extvbus();
> -#endif
> -
> #ifdef CONFIG_OMAP4430
> u32 *usbotghs_control =
> (u32 *)((*ctrl)->control_usbotghs_ctrl);
> diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h
> index ae645c7..b8a29e1 100644
> --- a/drivers/usb/musb/omap3.h
> +++ b/drivers/usb/musb/omap3.h
> @@ -32,8 +32,4 @@
>
> int musb_platform_init(void);
>
> -#ifdef CONFIG_OMAP3_EVM
> -extern u8 omap3_evm_need_extvbus(void);
> -#endif
> -
> #endif /* _MUSB_OMAP3_H */
> diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
> deleted file mode 100644
> index 1dd71a8..0000000
> --- a/include/configs/omap3_evm.h
> +++ /dev/null
> @@ -1,154 +0,0 @@
> -/*
> - * Configuration settings for the TI OMAP3 EVM board.
> - *
> - * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
> - *
> - * Author :
> - * Manikandan Pillai <mani.pillai@ti.com>
> - * Derived from Beagle Board and 3430 SDP code by
> - * Richard Woodruff <r-woodruff2@ti.com>
> - * Syed Mohammed Khasim <khasim@ti.com>
> - *
> - * Manikandan Pillai <mani.pillai@ti.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -
> -#ifndef __OMAP3EVM_CONFIG_H
> -#define __OMAP3EVM_CONFIG_H
> -
> -#include <asm/arch/cpu.h>
> -#include <asm/arch/omap.h>
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot commands
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_CMD_ASKENV
> -
> -#define CONFIG_CMD_EXT2
> -#define CONFIG_CMD_FAT
> -#define CONFIG_CMD_JFFS2
> -
> -#define CONFIG_CMD_I2C
> -#define CONFIG_CMD_MMC
> -#define CONFIG_CMD_NAND
> -#define CONFIG_CMD_DHCP
> -#define CONFIG_CMD_PING
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot features
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_SYS_LONGHELP
> -#define CONFIG_SYS_HUSH_PARSER
> -
> -/* Display CPU and Board information */
> -#define CONFIG_DISPLAY_CPUINFO
> -#define CONFIG_DISPLAY_BOARDINFO
> -
> -/* Allow to overwrite serial and ethaddr */
> -#define CONFIG_ENV_OVERWRITE
> -
> -/* Add auto-completion support */
> -#define CONFIG_AUTO_COMPLETE
> -
> -/* ----------------------------------------------------------------------------
> - * Supported hardware
> - * ----------------------------------------------------------------------------
> - */
> -
> -/* MMC */
> -#define CONFIG_MMC
> -#define CONFIG_GENERIC_MMC
> -#define CONFIG_OMAP_HSMMC
> -
> -/* SPL */
> -#define CONFIG_SPL_MMC_SUPPORT
> -#define CONFIG_SPL_FAT_SUPPORT
> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
> -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
> -
> -/* Partition tables */
> -#define CONFIG_EFI_PARTITION
> -#define CONFIG_DOS_PARTITION
> -
> -/* USB
> - *
> - * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
> - * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
> - */
> -#define CONFIG_USB_OMAP3
> -#define CONFIG_USB_MUSB_HCD
> -/* #define CONFIG_USB_MUSB_UDC */
> -
> -/* NAND SPL */
> -#define CONFIG_SPL_NAND_SIMPLE
> -#define CONFIG_SPL_NAND_SUPPORT
> -#define CONFIG_SPL_NAND_BASE
> -#define CONFIG_SPL_NAND_DRIVERS
> -#define CONFIG_SPL_NAND_ECC
> -#define CONFIG_SYS_NAND_5_ADDR_CYCLE
> -#define CONFIG_SYS_NAND_PAGE_COUNT 64
> -#define CONFIG_SYS_NAND_PAGE_SIZE 2048
> -#define CONFIG_SYS_NAND_OOBSIZE 64
> -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
> -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> - 10, 11, 12, 13}
> -#define CONFIG_SYS_NAND_ECCSIZE 512
> -#define CONFIG_SYS_NAND_ECCBYTES 3
> -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
> -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
> -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
> -
> -/* -----------------------------------------------------------------------------
> - * Include common board configuration
> - * -----------------------------------------------------------------------------
> - */
> -#include "omap3_evm_common.h"
> -
> -/* -----------------------------------------------------------------------------
> - * Default environment
> - * -----------------------------------------------------------------------------
> - */
> -#define CONFIG_BOOTDELAY 3
> -
> -#define CONFIG_EXTRA_ENV_SETTINGS \
> - "loadaddr=0x82000000\0" \
> - "usbtty=cdc_acm\0" \
> - "mmcdev=0\0" \
> - "console=ttyO0,115200n8\0" \
> - "mmcargs=setenv bootargs console=${console} " \
> - "root=/dev/mmcblk0p2 rw " \
> - "rootfstype=ext3 rootwait\0" \
> - "nandargs=setenv bootargs console=${console} " \
> - "root=/dev/mtdblock4 rw " \
> - "rootfstype=jffs2\0" \
> - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
> - "bootscript=echo Running bootscript from mmc ...; " \
> - "source ${loadaddr}\0" \
> - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
> - "mmcboot=echo Booting from mmc ...; " \
> - "run mmcargs; " \
> - "bootm ${loadaddr}\0" \
> - "nandboot=echo Booting from nand ...; " \
> - "run nandargs; " \
> - "onenand read ${loadaddr} 280000 400000; " \
> - "bootm ${loadaddr}\0" \
> -
> -#define CONFIG_BOOTCOMMAND \
> - "mmc dev ${mmcdev}; if mmc rescan; then " \
> - "if run loadbootscript; then " \
> - "run bootscript; " \
> - "else " \
> - "if run loaduimage; then " \
> - "run mmcboot; " \
> - "else run nandboot; " \
> - "fi; " \
> - "fi; " \
> - "else run nandboot; fi"
> -
> -#endif /* __OMAP3EVM_CONFIG_H */
> diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h
> deleted file mode 100644
> index 7e7f6f2..0000000
> --- a/include/configs/omap3_evm_common.h
> +++ /dev/null
> @@ -1,289 +0,0 @@
> -/*
> - * Common configuration settings for the TI OMAP3 EVM board.
> - *
> - * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -
> -#ifndef __OMAP3_EVM_COMMON_H
> -#define __OMAP3_EVM_COMMON_H
> -
> -/*
> - * High level configuration options
> - */
> -#define CONFIG_OMAP /* This is TI OMAP core */
> -#define CONFIG_OMAP_GPIO
> -#define CONFIG_OMAP_COMMON
> -/* Common ARM Erratas */
> -#define CONFIG_ARM_ERRATA_454179
> -#define CONFIG_ARM_ERRATA_430973
> -#define CONFIG_ARM_ERRATA_621766
> -
> -#define CONFIG_SDRC /* The chip has SDRC controller */
> -
> -#define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
> -#define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
> -
> -/*
> - * Clock related definitions
> - */
> -#define V_OSCK 26000000 /* Clock output from T2 */
> -#define V_SCLK (V_OSCK >> 1)
> -
> -/*
> - * OMAP3 has 12 GP timers, they can be driven by the system clock
> - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
> - * This rate is divided by a local divisor.
> - */
> -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
> -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
> -
> -/* Size of environment - 128KB */
> -#define CONFIG_ENV_SIZE (128 << 10)
> -
> -/* Size of malloc pool */
> -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
> -
> -/*
> - * Physical Memory Map
> - * Note 1: CS1 may or may not be populated
> - * Note 2: SDRAM size is expected to be at least 32MB
> - */
> -#define CONFIG_NR_DRAM_BANKS 2
> -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
> -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
> -
> -/* Limits for memtest */
> -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
> -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
> - 0x01F00000) /* 31MB */
> -
> -/* Default load address */
> -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
> -
> -/* -----------------------------------------------------------------------------
> - * Hardware drivers
> - * -----------------------------------------------------------------------------
> - */
> -
> -/*
> - * NS16550 Configuration
> - */
> -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
> -
> -#define CONFIG_SYS_NS16550
> -#define CONFIG_SYS_NS16550_SERIAL
> -#define CONFIG_SYS_NS16550_REG_SIZE (-4)
> -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
> -
> -/*
> - * select serial console configuration
> - */
> -#define CONFIG_CONS_INDEX 1
> -#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
> -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
> -#define CONFIG_BAUDRATE 115200
> -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
> - 115200}
> -
> -/*
> - * I2C
> - */
> -#define CONFIG_SYS_I2C
> -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
> -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
> -#define CONFIG_SYS_I2C_OMAP34XX
> -
> -/*
> - * PISMO support
> - */
> -/* Monitor at start of flash - Reserve 2 sectors */
> -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
> -
> -#define CONFIG_SYS_MONITOR_LEN (256 << 10)
> -
> -/* Start location & size of environment */
> -#define ONENAND_ENV_OFFSET 0x260000
> -#define SMNAND_ENV_OFFSET 0x260000
> -
> -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
> -
> -/*
> - * NAND
> - */
> -/* Physical address to access NAND */
> -#define CONFIG_SYS_NAND_ADDR NAND_BASE
> -
> -/* Physical address to access NAND at CS0 */
> -#define CONFIG_SYS_NAND_BASE NAND_BASE
> -
> -/* Max number of NAND devices */
> -#define CONFIG_SYS_MAX_NAND_DEVICE 1
> -#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
> -/* Timeout values (in ticks) */
> -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
> -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
> -
> -/* Flash banks JFFS2 should use */
> -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
> - CONFIG_SYS_MAX_NAND_DEVICE)
> -
> -#define CONFIG_SYS_JFFS2_MEM_NAND
> -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
> -#define CONFIG_SYS_JFFS2_NUM_BANKS 1
> -
> -#define CONFIG_JFFS2_NAND
> -/* nand device jffs2 lives on */
> -#define CONFIG_JFFS2_DEV "nand0"
> -/* Start of jffs2 partition */
> -#define CONFIG_JFFS2_PART_OFFSET 0x680000
> -/* Size of jffs2 partition */
> -#define CONFIG_JFFS2_PART_SIZE 0xf980000
> -
> -/*
> - * USB
> - */
> -#ifdef CONFIG_USB_OMAP3
> -
> -#ifdef CONFIG_USB_MUSB_HCD
> -#define CONFIG_CMD_USB
> -
> -#define CONFIG_USB_STORAGE
> -#define CONGIG_CMD_STORAGE
> -#define CONFIG_CMD_FAT
> -
> -#ifdef CONFIG_USB_KEYBOARD
> -#define CONFIG_SYS_USB_EVENT_POLL
> -#define CONFIG_PREBOOT "usb start"
> -#endif /* CONFIG_USB_KEYBOARD */
> -
> -#endif /* CONFIG_USB_MUSB_HCD */
> -
> -#ifdef CONFIG_USB_MUSB_UDC
> -/* USB device configuration */
> -#define CONFIG_USB_DEVICE
> -#define CONFIG_USB_TTY
> -#define CONFIG_SYS_CONSOLE_IS_IN_ENV
> -
> -/* Change these to suit your needs */
> -#define CONFIG_USBD_VENDORID 0x0451
> -#define CONFIG_USBD_PRODUCTID 0x5678
> -#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
> -#define CONFIG_USBD_PRODUCT_NAME "EVM"
> -#endif /* CONFIG_USB_MUSB_UDC */
> -
> -#endif /* CONFIG_USB_OMAP3 */
> -
> -/* ----------------------------------------------------------------------------
> - * U-boot features
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
> -
> -#define CONFIG_MISC_INIT_R
> -
> -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> -#define CONFIG_SETUP_MEMORY_TAGS
> -#define CONFIG_INITRD_TAG
> -#define CONFIG_REVISION_TAG
> -
> -/* Size of Console IO buffer */
> -#define CONFIG_SYS_CBSIZE 512
> -
> -/* Size of print buffer */
> -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> - sizeof(CONFIG_SYS_PROMPT) + 16)
> -
> -/* Size of bootarg buffer */
> -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
> -
> -#define CONFIG_BOOTFILE "uImage"
> -
> -/*
> - * NAND / OneNAND
> - */
> -#if defined(CONFIG_CMD_NAND)
> -#define CONFIG_SYS_FLASH_BASE NAND_BASE
> -
> -#define CONFIG_NAND_OMAP_GPMC
> -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
> -#elif defined(CONFIG_CMD_ONENAND)
> -#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
> -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
> -#endif
> -
> -#if !defined(CONFIG_ENV_IS_NOWHERE)
> -#if defined(CONFIG_CMD_NAND)
> -#define CONFIG_ENV_IS_IN_NAND
> -#elif defined(CONFIG_CMD_ONENAND)
> -#define CONFIG_ENV_IS_IN_ONENAND
> -#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
> -#endif
> -#endif /* CONFIG_ENV_IS_NOWHERE */
> -
> -#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
> -
> -#if defined(CONFIG_CMD_NET)
> -
> -/* Ethernet (SMSC9115 from SMSC9118 family) */
> -#define CONFIG_SMC911X
> -#define CONFIG_SMC911X_32_BIT
> -#define CONFIG_SMC911X_BASE 0x2C000000
> -
> -/* BOOTP fields */
> -#define CONFIG_BOOTP_SUBNETMASK 0x00000001
> -#define CONFIG_BOOTP_GATEWAY 0x00000002
> -#define CONFIG_BOOTP_HOSTNAME 0x00000004
> -#define CONFIG_BOOTP_BOOTPATH 0x00000010
> -
> -#endif /* CONFIG_CMD_NET */
> -
> -/* Support for relocation */
> -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
> -#define CONFIG_SYS_INIT_RAM_SIZE 0x800
> -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
> - CONFIG_SYS_INIT_RAM_SIZE - \
> - GENERATED_GBL_DATA_SIZE)
> -
> -/* -----------------------------------------------------------------------------
> - * Board specific
> - * -----------------------------------------------------------------------------
> - */
> -#define CONFIG_SYS_NO_FLASH
> -
> -/* Uncomment to define the board revision statically */
> -/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
> -
> -#define CONFIG_SYS_CACHELINE_SIZE 64
> -
> -/* Defines for SPL */
> -#define CONFIG_SPL_FRAMEWORK
> -#define CONFIG_SPL_TEXT_BASE 0x40200800
> -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
> -
> -#define CONFIG_SPL_BSS_START_ADDR 0x80000000
> -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
> -
> -#define CONFIG_SPL_BOARD_INIT
> -#define CONFIG_SPL_LIBCOMMON_SUPPORT
> -#define CONFIG_SPL_LIBDISK_SUPPORT
> -#define CONFIG_SPL_I2C_SUPPORT
> -#define CONFIG_SPL_LIBGENERIC_SUPPORT
> -#define CONFIG_SPL_SERIAL_SUPPORT
> -#define CONFIG_SPL_POWER_SUPPORT
> -#define CONFIG_SPL_OMAP3_ID_NAND
> -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
> -
> -/*
> - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
> - * 64 bytes before this address should be set aside for u-boot.img's
> - * header. That is 0x800FFFC0--0x80100000 should not be used for any
> - * other needs.
> - */
> -#define CONFIG_SYS_TEXT_BASE 0x80100000
> -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
> -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
> -
> -#endif /* __OMAP3_EVM_COMMON_H */
> diff --git a/include/configs/omap3_evm_quick_mmc.h b/include/configs/omap3_evm_quick_mmc.h
> deleted file mode 100644
> index 27cd9be..0000000
> --- a/include/configs/omap3_evm_quick_mmc.h
> +++ /dev/null
> @@ -1,92 +0,0 @@
> -/*
> - * Configuration settings for quick boot from MMC on OMAP3 EVM.
> - *
> - * Copyright (C) 2006-2010 Texas Instruments Incorporated - http://www.ti.com/
> - *
> - * Author :
> - * Sanjeev Premi <premi@ti.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -
> -#ifndef __OMAP3_EVM_QUICK_MMC_H
> -#define __OMAP3_EVM_QUICK_MMC_H
> -
> -#include <asm/arch/cpu.h>
> -#include <asm/arch/omap.h>
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot commands
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_CMD_MMC
> -#define CONFIG_CMD_FAT
> -
> -/*
> - * Board revision is detected by probing the Ethernet chip.
> - *
> - * When revision is statically configured via CONFIG_STATIC_BOARD_REV,
> - * this option can be removed. Generated binary is leaner by ~16Kbytes.
> - */
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot features
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_SILENT_CONSOLE
> -#define CONFIG_ENV_IS_NOWHERE
> -
> -/* ----------------------------------------------------------------------------
> - * Supported hardware
> - * ----------------------------------------------------------------------------
> - */
> -
> -/* MMC */
> -#define CONFIG_MMC
> -#define CONFIG_GENERIC_MMC
> -#define CONFIG_OMAP_HSMMC
> -#define CONFIG_DOS_PARTITION
> -
> -/* -----------------------------------------------------------------------------
> - * Include common board configuration
> - * -----------------------------------------------------------------------------
> - */
> -#include "omap3_evm_common.h"
> -
> -/* -----------------------------------------------------------------------------
> - * Default environment
> - * -----------------------------------------------------------------------------
> - */
> -#define CONFIG_BOOTDELAY 0
> -
> -#define CONFIG_EXTRA_ENV_SETTINGS \
> - "verify=no\0" \
> - "silent=1"
> -
> -#define CONFIG_BOOTCOMMAND \
> - "mmc rescan 0; " \
> - "fatload mmc 0 0x82000000 uImage; " \
> - "bootm 0x82000000;"
> -
> -/*
> - * Update the bootargs as necessary e.g. size of memory, partition and fstype
> - */
> -#define CONFIG_BOOTARGS \
> - "quiet " \
> - "console=ttyO0,115200n8 " \
> - "mem=128M " \
> - "noinitrd " \
> - "root=/dev/mmcblk0p2 rw " \
> - "rootfstype=ext3 rootwait"
> -
> -/*
> - * SPL
> - */
> -#define CONFIG_SPL_MMC_SUPPORT
> -#define CONFIG_SPL_FAT_SUPPORT
> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
> -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
> -
> -#endif /* __OMAP3_EVM_QUICK_MMC_H */
> diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h
> deleted file mode 100644
> index 124e8c6..0000000
> --- a/include/configs/omap3_evm_quick_nand.h
> +++ /dev/null
> @@ -1,92 +0,0 @@
> -/*
> - * Configuration settings for quick boot from NAND on OMAP3 EVM.
> - *
> - * Copyright (C) 2006-2010 Texas Instruments Incorporated - http://www.ti.com/
> - *
> - * Author :
> - * Sanjeev Premi <premi@ti.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -
> -#ifndef __OMAP3_EVM_QUICK_NAND_H
> -#define __OMAP3_EVM_QUICK_NAND_H
> -
> -#include <asm/arch/cpu.h>
> -#include <asm/arch/omap.h>
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot commands
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_CMD_NAND
> -
> -/*
> - * Board revision is detected by probing the Ethernet chip.
> - *
> - * When revision is statically configured via CONFIG_STATIC_BOARD_REV,
> - * this option can be removed. Generated binary is leaner by ~16Kbytes.
> - */
> -
> -/* ----------------------------------------------------------------------------
> - * Supported U-boot features
> - * ----------------------------------------------------------------------------
> - */
> -#define CONFIG_SILENT_CONSOLE
> -#define CONFIG_ENV_IS_NOWHERE
> -
> -/* -----------------------------------------------------------------------------
> - * Include common board configuration
> - * -----------------------------------------------------------------------------
> - */
> -#include "omap3_evm_common.h"
> -
> -/* -----------------------------------------------------------------------------
> - * Default environment
> - * -----------------------------------------------------------------------------
> - */
> -#define CONFIG_BOOTDELAY 0
> -
> -#define CONFIG_EXTRA_ENV_SETTINGS \
> - "verify=no\0" \
> - "silent=1"
> -
> -#define CONFIG_BOOTCOMMAND \
> - "nandecc hw; " \
> - "nand read.i 0x80000000 280000 300000; " \
> - "bootm 0x80000000;"
> -
> -/*
> - * Update the bootargs as necessary e.g. size of memory, partition and fstype
> - */
> -#define CONFIG_BOOTARGS \
> - "quiet " \
> - "console=ttyO0,115200n8 " \
> - "mem=128M " \
> - "noinitrd " \
> - "root=/dev/mtdblock4 rw " \
> - "rootfstype=jffs2 "
> -
> -/*
> - * SPL
> - */
> -#define CONFIG_SPL_NAND_SIMPLE
> -#define CONFIG_SPL_NAND_SUPPORT
> -#define CONFIG_SPL_NAND_BASE
> -#define CONFIG_SPL_NAND_DRIVERS
> -#define CONFIG_SPL_NAND_ECC
> -#define CONFIG_SYS_NAND_5_ADDR_CYCLE
> -#define CONFIG_SYS_NAND_PAGE_COUNT 64
> -#define CONFIG_SYS_NAND_PAGE_SIZE 2048
> -#define CONFIG_SYS_NAND_OOBSIZE 64
> -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
> -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> - 10, 11, 12, 13}
> -#define CONFIG_SYS_NAND_ECCSIZE 512
> -#define CONFIG_SYS_NAND_ECCBYTES 3
> -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
> -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
> -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
> -
> -#endif /* __OMAP3_EVM_QUICK_NAND_H */
> --
> 2.5.0.457.gab17608
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

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