From mboxrd@z Thu Jan  1 00:00:00 1970
From: Michal Simek <michal.simek@xilinx.com>
Date: Tue, 1 Sep 2015 10:22:51 +0200
Subject: [U-Boot] [PATCH v4 07/16] dts: zc770-xm010: Enable zynq qspi
 controller node
In-Reply-To: <1441087907-25993-8-git-send-email-jteki@openedev.com>
References: <1441087907-25993-1-git-send-email-jteki@openedev.com>
 <1441087907-25993-8-git-send-email-jteki@openedev.com>
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On 09/01/2015 08:11 AM, Jagan Teki wrote:
> Enabled zynq qspi controller node for zc770-xm010 board.
> 
> => sf probe 0 -- bus0 for selecting spi controller
> => sf probe 1 -- bus1 for selecting qspi controller
> 
> Signed-off-by: Jagan Teki <jteki@openedev.com>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Michal Simek <michal.simek@xilinx.com>
> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
> ---
>  arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
> index 680f24c..eec4c96 100644
> --- a/arch/arm/dts/zynq-zc770-xm010.dts
> +++ b/arch/arm/dts/zynq-zc770-xm010.dts
> @@ -17,6 +17,7 @@
>  		i2c0 = &i2c0;
>  		serial0 = &uart1;
>  		spi0 = &spi1;
> +		spi1 = &qspi;

We have discussed this internally 2 weeks ago and I would prefer to have
spi0 = &gspi; because then we can better handle internal commands where
qspi is expected on bus 0.

Can you please switch it?

Thanks,
Michal