From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jian Luo <Jian.Luo4@boschrexroth.de>
Date: Tue, 1 Sep 2015 13:49:43 +0200
Subject: [U-Boot] arm: socfpga: Question about FPGA/HPS SDRAM Bridge
In-Reply-To: <201509011103.48529.marex@denx.de>
References: <55E564BB.3090505@boschrexroth.de>
 <201509011103.48529.marex@denx.de>
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**
Hi Marek,

On 01.09.2015 11:03, Marek Vasut wrote:
> On Tuesday, September 01, 2015 at 10:41:31 AM, Jian Luo wrote:
>> Hi!
> Hi,
>
>> I've read about an implementation requirement regarding the usage of
>> FPGA/HPS SDRAM bridge.
>> (Link and Text attached at the end.)
>>
>> The 3. step involves writing the APPLYCFG bit in the STATICCFG register
>> while the SDRAM interface is completely IDLE.
>> IMHO, it's only possible in SPL stage where everything runs in SRAM.
>> FPGA however can not be configured until U-Boot is ready (step 2).
>> So warm reset should be performed after FPGA configuration.
>>
>> My idea is to patch sdram.c to dynamically write FPGAPORTRST and
>> APPLYCFG based on information in sysmgr_regs->romcodegrp_bootromswstate.
>>
>> Is any one working on this?
> We do this sort of stuff by running code from cache, see
> socfpga_sdram_apply_static_cfg() in arch/arm/mach-socfpga/misc.c .
Thanks. It's way better than run bootloader twice!
>
> You want to use the "bridge enable" and "bridge disable" commands
> to enable/disable the bridges between FPGA and HPS in U-Boot.
What about calling socfpga_sdram_apply_static_cfg() direct in 
socfpga_load() in drivers/fpga/socfpga.c to make it generic?
socfpga_load() already did step 1 and 2.
Is there any side effect  when fpga2sdram bridge is not used?
>
> Hope that helps ;-)
>
> Best regards,
> Marek Vasut