* [U-Boot] [PATCH 1/4] armv8: ls2085a: Update serdes1_cfg_tbl for 0x33 & 0x35 protocol
@ 2015-08-07 12:31 Prabhakar Kushwaha
2015-09-02 2:45 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Prabhakar Kushwaha @ 2015-08-07 12:31 UTC (permalink / raw)
To: u-boot
Update 0x33 and 0x35 serdes protocol as per updated SoC document
in array serdes1_cfg_tbl.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c b/arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c
index 098745b..0b79a50 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c
@@ -32,9 +32,9 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0x2A, {XFI8, XFI7, XFI6, XFI5, XFI4, XFI3, XFI2, XFI1 } },
{0x2B, {SGMII8, SGMII7, SGMII6, SGMII5, XAUI1, XAUI1, XAUI1, XAUI1 } },
{0x32, {XAUI2, XAUI2, XAUI2, XAUI2, XAUI1, XAUI1, XAUI1, XAUI1 } },
- {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_D, QSGMII_C, QSGMII_B,
- QSGMII_A} },
- {0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
+ {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_C, QSGMII_D, QSGMII_A,
+ QSGMII_B} },
+ {0x35, {QSGMII_C, QSGMII_D, QSGMII_A, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
{}
};
static struct serdes_config serdes2_cfg_tbl[] = {
--
1.9.1
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2015-08-07 12:31 [U-Boot] [PATCH 1/4] armv8: ls2085a: Update serdes1_cfg_tbl for 0x33 & 0x35 protocol Prabhakar Kushwaha
2015-09-02 2:45 ` York Sun
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