From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jian Luo Date: Thu, 3 Sep 2015 13:12:03 +0200 Subject: [U-Boot] [PATCH] arm: socfpga: dm: Fix DM initialization failure after warm reset In-Reply-To: <201509031246.15600.marex@denx.de> References: <55E01ECE.6020309@boschrexroth.de> <201509031209.24471.marex@denx.de> <55E81E29.6060504@boschrexroth.de> <201509031246.15600.marex@denx.de> Message-ID: <55E82B03.6090102@boschrexroth.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03.09.2015 12:46, Marek Vasut wrote: > On Thursday, September 03, 2015 at 12:17:13 PM, Jian Luo wrote: > > Hi! > > [...] > >> >> Yes, I can. But U-Boot can still have problem with other Image which >> >> disables ECC. >> >> I found another post related to this problem >> >> https://lkml.org/lkml/2015/2/6/685 . >> >> >> >> Quote: To initialize ECC, the OCRAM needs to enable ECC then clear >> >> >> >> the entire >> >> >> >> memory to zero before using it. >> >> Hi! >> >> > Oh, but that is a problem, since we're running from the OCRAM ourselves, >> > thus we cannot clear the OCRAM. Maybe we should force-disable the ECC >> > instead? But can we be sure that the corruption does not happen when >> > you disable ECC ? >> >> Yes, that will be a problem. It's also why I let the SYSMGR_ECC_OCRAM_EN >> bit intact in the patch. > > OK, but what about turning the ECC off in the SPL, will that also introduce > corruption or not ? That might be the right fix, no ? Hi Marek, Sorry, I don't know the detail of ECC implementation in socfpga. Dinh might have the answer to that. Anyhow I still think let the setting untouched is the safest fix. SPL should use the same ECC setting which BROM loads SPL with. > > Best regards, > Marek Vasut Best regards, Jian Luo