From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Fri, 18 Sep 2015 08:24:22 +0200 Subject: [U-Boot] [PATCH] arm: socfpga: Fix cache configuration In-Reply-To: <20150918061641.GA13992@amd> References: <1442503829-28882-1-git-send-email-sr@denx.de> <20150918061641.GA13992@amd> Message-ID: <55FBAE16.8050809@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Pavel, On 18.09.2015 08:16, Pavel Machek wrote: > On Thu 2015-09-17 17:30:29, Stefan Roese wrote: >> By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache >> policy is selected. This leads to much better performance on the SoCFPGA. >> A quick network test shows this: >> >> Without this patch: >> => tftp 100000 big-40mb >> Speed: 1000, full duplex >> Using dwmac.ff702000 device >> TFTP from server 192.168.1.54; our IP address is 192.168.1.252 >> Filename 'big-40mb'. >> Load address: 0x100000 >> Loading: ################################################################# >> ################################################################# >> ################################################################# >> ################################################################# >> ########################## >> 2.5 MiB/s >> >> With this patch: >> => tftp 100000 big-40mb >> Speed: 1000, full duplex >> Using dwmac.ff702000 device >> TFTP from server 192.168.1.54; our IP address is 192.168.1.252 >> Filename 'big-40mb'. >> Load address: 0x100000 >> Loading: ################################################################# >> ################################################################# >> ################################################################# >> ################################################################# >> ########################## >> 7.6 MiB/s >> >> A performance improvement of factor ~3. > > Ok, so you turn on write-back cache and it is faster. Its not only faster. My tests have shown, that the current implementation (WRITEALLOC) does not enable the dcache at all. No performance difference with dcache enable or disabled. I also tested this by removing the dcache flush and invalidate calls from the ethernet driver. And tftp still worked without any problems (same slow speed of course) with dcache enabled. On platforms with a really enabled dcache, such a change leads to a non-working network interface. The only conclusion I can draw from this is, that in the current configuration (WRITEALLOC) the dcache is not enabled at all. With this patch now I'm seeing network speeds that are similar to other platforms. > Now... do you have an explanation why this is safe to do? Are there > cache flushes that need to be added to the code now that we turned on > write-back? I have not found any issues yet with this patch added. The cache handling calls (flush, invalidate) are already included in the code using it (e.g. USB, ethernet, MMC). Thanks, Stefan