[U-Boot] [PATCH v3 0/2] nios2: convert altera_jtag_uart to driver model

[U-Boot] [PATCH v3 0/2] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Update the dts and convert altera_jtag_uart to driver model.

v2
  add ioremap.
  make the change to dts compatible with linux.

v3
  use fdt address translation patch from Stefan Roese.
  fix watchdog and loop as Marek suggested.

Thomas Chou (2):
  nios2: map physical address to uncached virtual address
  nios2: convert altera_jtag_uart to driver model

 arch/nios2/cpu/interrupts.c       |   4 +-
 arch/nios2/dts/3c120_devboard.dts |   5 ++
 arch/nios2/include/asm/io.h       |   5 ++
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig            |  13 +++++
 drivers/serial/altera_jtag_uart.c | 112 ++++++++++++++++++++++----------------
 include/configs/nios2-generic.h   |   3 -
 7 files changed, 93 insertions(+), 52 deletions(-)

-- 
2.1.4

[U-Boot] [PATCH v3 1/2] nios2: map physical address to uncached virtual address

[Thomas Chou]

Add ioremap() to map physical address to uncached virtual
address. We need this to convert the reg address from the
device tree.

The order of headers inclusion in interrupts.c is changed
because common.h will include board header that contains
IO_REGION_BASE.

In the future, the IO_REGION_BASE should be decided from
the device tree.
tree

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
---
 arch/nios2/cpu/interrupts.c | 4 ++--
 arch/nios2/include/asm/io.h | 5 +++++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c
index 9d85eb0..1599674 100644
--- a/arch/nios2/cpu/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -8,12 +8,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <common.h>
+#include <command.h>
 #include <asm/nios2.h>
 #include <asm/types.h>
 #include <asm/io.h>
 #include <asm/ptrace.h>
-#include <common.h>
-#include <command.h>
 
 /*************************************************************************/
 struct	irq_action {
diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h
index 69ab23e..b4bd20f 100644
--- a/arch/nios2/include/asm/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -42,6 +42,11 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 	return (phys_addr_t)(vaddr);
 }
 
+static inline void *ioremap(unsigned long physaddr, unsigned long size)
+{
+	return (void *)(IO_REGION_BASE | physaddr);
+}
+
 extern unsigned char inb (unsigned char *port);
 extern unsigned short inw (unsigned short *port);
 extern unsigned inl (unsigned port);
-- 
2.1.4

[U-Boot] [PATCH v3 2/2] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
---
 arch/nios2/dts/3c120_devboard.dts |   5 ++
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig            |  13 +++++
 drivers/serial/altera_jtag_uart.c | 112 ++++++++++++++++++++++----------------
 include/configs/nios2-generic.h   |   3 -
 5 files changed, 86 insertions(+), 50 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts
index 02524ab..7f76328 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -93,6 +93,7 @@
 				reg = <0x00004d50 0x00000008>;
 				interrupt-parent = <&cpu>;
 				interrupts = <1>;
+				u-boot,dm-pre-reloc;
 			};
 
 			tse_mac: ethernet at 0x4000 {
@@ -147,6 +148,10 @@
 		};
 	};
 
+	aliases {
+		console = &jtag_uart;
+	};
+
 	chosen {
 		bootargs = "debug console=ttyJ0,115200";
 	};
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 9c1bec5..9dc6a72 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,4 +1,5 @@
 CONFIG_NIOS2=y
+CONFIG_DM_SERIAL=y
 CONFIG_TARGET_NIOS2_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
 CONFIG_HUSH_PARSER=y
@@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_ALTERA_JTAG_UART=y
+CONFIG_ALTERA_JTAG_UART_BYPASS=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..5a8cb3a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -109,6 +109,19 @@ config DEBUG_UART_SHIFT
 	  value. Use this value to specify the shift to use, where 0=byte
 	  registers, 2=32-bit word registers, etc.
 
+config ALTERA_JTAG_UART
+	bool "Altera JTAG UART support"
+	depends on NIOS2 && DM_SERIAL
+	help
+	  Select this to enable an JTAG UART for Altera devices.
+
+config ALTERA_JTAG_UART_BYPASS
+	bool "Bypass output when no connection"
+	depends on ALTERA_JTAG_UART
+	help
+	  Bypass console output and keep going even if there is no
+	  JTAG terminal connection with the host.
+
 config ROCKCHIP_SERIAL
 	bool "Rockchip on-chip UART support"
 	depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 9a81402..6d5b718 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -6,98 +6,116 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <watchdog.h>
 #include <asm/io.h>
-#include <linux/compiler.h>
 #include <serial.h>
 
-typedef volatile struct {
+DECLARE_GLOBAL_DATA_PTR;
+
+struct altera_jtaguart_regs {
 	unsigned	data;			/* Data register */
 	unsigned	control;		/* Control register */
-} nios_jtag_t;
+};
+
+struct altera_jtaguart_platdata {
+	struct altera_jtaguart_regs *reg;
+};
 
 /* data register */
 #define NIOS_JTAG_RVALID	(1<<15)		/* Read valid */
-#define NIOS_JTAG_DATA(d)	((d)&0x0ff)	/* Read data */
-#define NIOS_JTAG_RAVAIL(d)	((d)>>16)	/* Read space avail */
 
 /* control register */
-#define NIOS_JTAG_RE		(1 << 0)	/* read intr enable */
-#define NIOS_JTAG_WE		(1 << 1)	/* write intr enable */
-#define NIOS_JTAG_RI		(1 << 8)	/* read intr pending */
-#define NIOS_JTAG_WI		(1 << 9)	/* write intr pending*/
 #define NIOS_JTAG_AC		(1 << 10)	/* activity indicator */
 #define NIOS_JTAG_RRDY		(1 << 12)	/* read available */
 #define NIOS_JTAG_WSPACE(d)	((d)>>16)	/* Write space avail */
 
-DECLARE_GLOBAL_DATA_PTR;
-
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-static void altera_jtag_serial_setbrg(void)
-{
-}
-
-static int altera_jtag_serial_init(void)
+static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
 {
 	return 0;
 }
 
-static void altera_jtag_serial_putc(char c)
+static int altera_jtaguart_putc(struct udevice *dev, const char c)
 {
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+
 	while (1) {
-		unsigned st = readl(&jtag->control);
+		unsigned st = readl(&regs->control);
 		if (NIOS_JTAG_WSPACE(st))
 			break;
 #ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
 		if (!(st & NIOS_JTAG_AC)) /* no connection */
-			return;
+			return 0;
 #endif
 		WATCHDOG_RESET();
 	}
-	writel ((unsigned char)c, &jtag->data);
+	writel((unsigned char)c, &regs->data);
+
+	return 0;
 }
 
-static int altera_jtag_serial_tstc(void)
+static int altera_jtaguart_pending(struct udevice *dev, bool input)
 {
-	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	unsigned st = readl(&regs->control);
+
+	if (input)
+		return (st & NIOS_JTAG_RRDY) ? 1 : 0;
+	else
+		return NIOS_JTAG_WSPACE(st) ? 0 : 1;
 }
 
-static int altera_jtag_serial_getc(void)
+static int altera_jtaguart_getc(struct udevice *dev)
 {
-	int c;
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
 	unsigned val;
 
 	while (1) {
 		WATCHDOG_RESET ();
-		val = readl (&jtag->data);
+		val = readl(&regs->data);
 		if (val & NIOS_JTAG_RVALID)
 			break;
 	}
-	c = val & 0x0ff;
-	return (c);
+	return (val & 0xff);
 }
 
-static struct serial_device altera_jtag_serial_drv = {
-	.name	= "altera_jtag_uart",
-	.start	= altera_jtag_serial_init,
-	.stop	= NULL,
-	.setbrg	= altera_jtag_serial_setbrg,
-	.putc	= altera_jtag_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= altera_jtag_serial_getc,
-	.tstc	= altera_jtag_serial_tstc,
-};
-
-void altera_jtag_serial_initialize(void)
+static int altera_jtaguart_probe(struct udevice *dev)
 {
-	serial_register(&altera_jtag_serial_drv);
+	return 0;
 }
 
-__weak struct serial_device *default_serial_console(void)
+static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
 {
-	return &altera_jtag_serial_drv;
+	struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
+
+	plat->reg = ioremap(dev_get_addr(dev),
+		sizeof(struct altera_jtaguart_regs));
+
+	return 0;
 }
+
+static const struct dm_serial_ops altera_jtaguart_ops = {
+	.putc = altera_jtaguart_putc,
+	.pending = altera_jtaguart_pending,
+	.getc = altera_jtaguart_getc,
+	.setbrg = altera_jtaguart_setbrg,
+};
+
+static const struct udevice_id altera_jtaguart_ids[] = {
+	{ .compatible = "altr,juart-1.0", },
+	{ }
+};
+
+U_BOOT_DRIVER(altera_jtaguart) = {
+	.name	= "altera_jtaguart",
+	.id	= UCLASS_SERIAL,
+	.of_match = altera_jtaguart_ids,
+	.ofdata_to_platdata = altera_jtaguart_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct altera_jtaguart_platdata),
+	.probe = altera_jtaguart_probe,
+	.ops	= &altera_jtaguart_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 66ad2f0..bd6d45c 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -23,14 +23,11 @@
 /*
  * SERIAL
  */
-#define CONFIG_ALTERA_JTAG_UART
 #if defined(CONFIG_ALTERA_JTAG_UART)
-# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_JTAG_UART_BASE
 #else
 # define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_UART_BASE
 #endif
 
-#define CONFIG_ALTERA_JTAG_UART_BYPASS
 #define CONFIG_SYS_NIOS_FIXEDBAUD
 #define CONFIG_BAUDRATE		CONFIG_SYS_UART_BAUD
 #define CONFIG_SYS_BAUDRATE_TABLE	{CONFIG_BAUDRATE}
-- 
2.1.4

[U-Boot] [PATCH v3 1/2] nios2: map physical address to uncached virtual address

[Thomas Chou]

On 09/15/2015 03:28 PM, Thomas Chou wrote:
> Add ioremap() to map physical address to uncached virtual
> address. We need this to convert the reg address from the
> device tree.
>
> The order of headers inclusion in interrupts.c is changed
> because common.h will include board header that contains
> IO_REGION_BASE.
>
> In the future, the IO_REGION_BASE should be decided from
> the device tree.
> tree
>
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
> Acked-by: Marek Vasut <marex@denx.de>
> ---
>   arch/nios2/cpu/interrupts.c | 4 ++--
>   arch/nios2/include/asm/io.h | 5 +++++
>   2 files changed, 7 insertions(+), 2 deletions(-)

This patch should not be bound with the jtag uart driver. Separate this 
from the series.

Applied to u-boot-nios.

[U-Boot] [PATCH v4] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
---

v2
  add ioremap.
  make the change to dts compatible with linux.

v3
  use fdt address translation patch from Stefan Roese.
  fix watchdog and loop as Marek suggested.

v4
  add clear AC flag to probe().
  remove polling loops and watchdog reset because they are
    done in the serial-uclass.c.

 arch/nios2/dts/3c120_devboard.dts |   5 ++
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig            |  13 ++++
 drivers/serial/altera_jtag_uart.c | 137 ++++++++++++++++++++++----------------
 include/configs/nios2-generic.h   |   3 -
 5 files changed, 102 insertions(+), 59 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts
index 02524ab..7f76328 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -93,6 +93,7 @@
 				reg = <0x00004d50 0x00000008>;
 				interrupt-parent = <&cpu>;
 				interrupts = <1>;
+				u-boot,dm-pre-reloc;
 			};
 
 			tse_mac: ethernet at 0x4000 {
@@ -147,6 +148,10 @@
 		};
 	};
 
+	aliases {
+		console = &jtag_uart;
+	};
+
 	chosen {
 		bootargs = "debug console=ttyJ0,115200";
 	};
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 9c1bec5..9dc6a72 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,4 +1,5 @@
 CONFIG_NIOS2=y
+CONFIG_DM_SERIAL=y
 CONFIG_TARGET_NIOS2_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
 CONFIG_HUSH_PARSER=y
@@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_ALTERA_JTAG_UART=y
+CONFIG_ALTERA_JTAG_UART_BYPASS=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..5a8cb3a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -109,6 +109,19 @@ config DEBUG_UART_SHIFT
 	  value. Use this value to specify the shift to use, where 0=byte
 	  registers, 2=32-bit word registers, etc.
 
+config ALTERA_JTAG_UART
+	bool "Altera JTAG UART support"
+	depends on NIOS2 && DM_SERIAL
+	help
+	  Select this to enable an JTAG UART for Altera devices.
+
+config ALTERA_JTAG_UART_BYPASS
+	bool "Bypass output when no connection"
+	depends on ALTERA_JTAG_UART
+	help
+	  Bypass console output and keep going even if there is no
+	  JTAG terminal connection with the host.
+
 config ROCKCHIP_SERIAL
 	bool "Rockchip on-chip UART support"
 	depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 9a81402..5f7a0f3 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -6,98 +6,123 @@
  */
 
 #include <common.h>
-#include <watchdog.h>
+#include <dm.h>
+#include <errno.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
-typedef volatile struct {
+struct altera_jtaguart_regs {
 	unsigned	data;			/* Data register */
 	unsigned	control;		/* Control register */
-} nios_jtag_t;
+};
+
+struct altera_jtaguart_platdata {
+	struct altera_jtaguart_regs *reg;
+};
 
 /* data register */
 #define NIOS_JTAG_RVALID	(1<<15)		/* Read valid */
-#define NIOS_JTAG_DATA(d)	((d)&0x0ff)	/* Read data */
-#define NIOS_JTAG_RAVAIL(d)	((d)>>16)	/* Read space avail */
 
 /* control register */
-#define NIOS_JTAG_RE		(1 << 0)	/* read intr enable */
-#define NIOS_JTAG_WE		(1 << 1)	/* write intr enable */
-#define NIOS_JTAG_RI		(1 << 8)	/* read intr pending */
-#define NIOS_JTAG_WI		(1 << 9)	/* write intr pending*/
 #define NIOS_JTAG_AC		(1 << 10)	/* activity indicator */
 #define NIOS_JTAG_RRDY		(1 << 12)	/* read available */
 #define NIOS_JTAG_WSPACE(d)	((d)>>16)	/* Write space avail */
+/* Write fifo size. FIXME: this should be extracted with sopc2dts */
+#define NIOS_WRITE_DEPTH	64
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-static void altera_jtag_serial_setbrg(void)
-{
-}
-
-static int altera_jtag_serial_init(void)
+static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
 {
 	return 0;
 }
 
-static void altera_jtag_serial_putc(char c)
+static int altera_jtaguart_putc(struct udevice *dev, const char c)
 {
-	while (1) {
-		unsigned st = readl(&jtag->control);
-		if (NIOS_JTAG_WSPACE(st))
-			break;
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	unsigned st = readl(&regs->control);
+
 #ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
-		if (!(st & NIOS_JTAG_AC)) /* no connection */
-			return;
+	if (!(st & NIOS_JTAG_AC)) /* no connection */
+		return -ENETUNREACH;
 #endif
-		WATCHDOG_RESET();
-	}
-	writel ((unsigned char)c, &jtag->data);
+
+	if (NIOS_JTAG_WSPACE(st) == 0)
+		return -EAGAIN;
+
+	writel((unsigned char)c, &regs->data);
+
+	return 0;
 }
 
-static int altera_jtag_serial_tstc(void)
+static int altera_jtaguart_pending(struct udevice *dev, bool input)
 {
-	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	unsigned st = readl(&regs->control);
+
+	if (input)
+		return (st & NIOS_JTAG_RRDY) ? 1 : 0;
+	else
+		return (NIOS_JTAG_WSPACE(st) == NIOS_WRITE_DEPTH) ? 0 : 1;
 }
 
-static int altera_jtag_serial_getc(void)
+static int altera_jtaguart_getc(struct udevice *dev)
 {
-	int c;
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
 	unsigned val;
 
-	while (1) {
-		WATCHDOG_RESET ();
-		val = readl (&jtag->data);
-		if (val & NIOS_JTAG_RVALID)
-			break;
-	}
-	c = val & 0x0ff;
-	return (c);
-}
+	val = readl(&regs->data);
 
-static struct serial_device altera_jtag_serial_drv = {
-	.name	= "altera_jtag_uart",
-	.start	= altera_jtag_serial_init,
-	.stop	= NULL,
-	.setbrg	= altera_jtag_serial_setbrg,
-	.putc	= altera_jtag_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= altera_jtag_serial_getc,
-	.tstc	= altera_jtag_serial_tstc,
-};
+	if (val & NIOS_JTAG_RVALID)
+		return (val & 0xff);
+	else
+		return -EAGAIN;
+}
 
-void altera_jtag_serial_initialize(void)
+static int altera_jtaguart_probe(struct udevice *dev)
 {
-	serial_register(&altera_jtag_serial_drv);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+
+#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
+	writel(NIOS_JTAG_AC, &regs->control); /* clear AC flag */
+#endif
+	return 0;
 }
 
-__weak struct serial_device *default_serial_console(void)
+static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
 {
-	return &altera_jtag_serial_drv;
+	struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
+
+	plat->reg = ioremap(dev_get_addr(dev),
+		sizeof(struct altera_jtaguart_regs));
+
+	return 0;
 }
+
+static const struct dm_serial_ops altera_jtaguart_ops = {
+	.putc = altera_jtaguart_putc,
+	.pending = altera_jtaguart_pending,
+	.getc = altera_jtaguart_getc,
+	.setbrg = altera_jtaguart_setbrg,
+};
+
+static const struct udevice_id altera_jtaguart_ids[] = {
+	{ .compatible = "altr,juart-1.0", },
+	{ }
+};
+
+U_BOOT_DRIVER(altera_jtaguart) = {
+	.name	= "altera_jtaguart",
+	.id	= UCLASS_SERIAL,
+	.of_match = altera_jtaguart_ids,
+	.ofdata_to_platdata = altera_jtaguart_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct altera_jtaguart_platdata),
+	.probe = altera_jtaguart_probe,
+	.ops	= &altera_jtaguart_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 66ad2f0..bd6d45c 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -23,14 +23,11 @@
 /*
  * SERIAL
  */
-#define CONFIG_ALTERA_JTAG_UART
 #if defined(CONFIG_ALTERA_JTAG_UART)
-# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_JTAG_UART_BASE
 #else
 # define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_UART_BASE
 #endif
 
-#define CONFIG_ALTERA_JTAG_UART_BYPASS
 #define CONFIG_SYS_NIOS_FIXEDBAUD
 #define CONFIG_BAUDRATE		CONFIG_SYS_UART_BAUD
 #define CONFIG_SYS_BAUDRATE_TABLE	{CONFIG_BAUDRATE}
-- 
2.1.4

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
---

v2
  add ioremap.
  make the change to dts compatible with linux.

v3
  use fdt address translation patch from Stefan Roese.
  fix watchdog and loop as Marek suggested.

v4
  add clear AC flag to probe().
  remove polling loops and watchdog reset because they are
    done in the serial-uclass.c.

v5
  fix coding style as Marek suggested to altera_uart.

 arch/nios2/dts/3c120_devboard.dts |   5 ++
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig            |  13 ++++
 drivers/serial/altera_jtag_uart.c | 145 ++++++++++++++++++++++----------------
 include/configs/nios2-generic.h   |   3 -
 5 files changed, 106 insertions(+), 63 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts
index 02524ab..7f76328 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -93,6 +93,7 @@
 				reg = <0x00004d50 0x00000008>;
 				interrupt-parent = <&cpu>;
 				interrupts = <1>;
+				u-boot,dm-pre-reloc;
 			};
 
 			tse_mac: ethernet at 0x4000 {
@@ -147,6 +148,10 @@
 		};
 	};
 
+	aliases {
+		console = &jtag_uart;
+	};
+
 	chosen {
 		bootargs = "debug console=ttyJ0,115200";
 	};
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 9c1bec5..9dc6a72 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,4 +1,5 @@
 CONFIG_NIOS2=y
+CONFIG_DM_SERIAL=y
 CONFIG_TARGET_NIOS2_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
 CONFIG_HUSH_PARSER=y
@@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_ALTERA_JTAG_UART=y
+CONFIG_ALTERA_JTAG_UART_BYPASS=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..5a8cb3a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -109,6 +109,19 @@ config DEBUG_UART_SHIFT
 	  value. Use this value to specify the shift to use, where 0=byte
 	  registers, 2=32-bit word registers, etc.
 
+config ALTERA_JTAG_UART
+	bool "Altera JTAG UART support"
+	depends on NIOS2 && DM_SERIAL
+	help
+	  Select this to enable an JTAG UART for Altera devices.
+
+config ALTERA_JTAG_UART_BYPASS
+	bool "Bypass output when no connection"
+	depends on ALTERA_JTAG_UART
+	help
+	  Bypass console output and keep going even if there is no
+	  JTAG terminal connection with the host.
+
 config ROCKCHIP_SERIAL
 	bool "Rockchip on-chip UART support"
 	depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 9a81402..2c025bc 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -6,98 +6,123 @@
  */
 
 #include <common.h>
-#include <watchdog.h>
+#include <dm.h>
+#include <errno.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
-typedef volatile struct {
-	unsigned	data;			/* Data register */
-	unsigned	control;		/* Control register */
-} nios_jtag_t;
+struct altera_jtaguart_regs {
+	u32	data;			/* Data register */
+	u32	control;		/* Control register */
+};
+
+struct altera_jtaguart_platdata {
+	struct altera_jtaguart_regs *reg;
+};
 
 /* data register */
 #define NIOS_JTAG_RVALID	(1<<15)		/* Read valid */
-#define NIOS_JTAG_DATA(d)	((d)&0x0ff)	/* Read data */
-#define NIOS_JTAG_RAVAIL(d)	((d)>>16)	/* Read space avail */
 
 /* control register */
-#define NIOS_JTAG_RE		(1 << 0)	/* read intr enable */
-#define NIOS_JTAG_WE		(1 << 1)	/* write intr enable */
-#define NIOS_JTAG_RI		(1 << 8)	/* read intr pending */
-#define NIOS_JTAG_WI		(1 << 9)	/* write intr pending*/
 #define NIOS_JTAG_AC		(1 << 10)	/* activity indicator */
 #define NIOS_JTAG_RRDY		(1 << 12)	/* read available */
 #define NIOS_JTAG_WSPACE(d)	((d)>>16)	/* Write space avail */
+/* Write fifo size. FIXME: this should be extracted with sopc2dts */
+#define NIOS_JTAG_WRITE_DEPTH	64
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-static void altera_jtag_serial_setbrg(void)
-{
-}
-
-static int altera_jtag_serial_init(void)
+static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
 {
 	return 0;
 }
 
-static void altera_jtag_serial_putc(char c)
+static int altera_jtaguart_putc(struct udevice *dev, const char c)
 {
-	while (1) {
-		unsigned st = readl(&jtag->control);
-		if (NIOS_JTAG_WSPACE(st))
-			break;
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	u32 st = readl(&regs->control);
+
 #ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
-		if (!(st & NIOS_JTAG_AC)) /* no connection */
-			return;
+	if (!(st & NIOS_JTAG_AC)) /* no connection */
+		return -ENETUNREACH;
 #endif
-		WATCHDOG_RESET();
-	}
-	writel ((unsigned char)c, &jtag->data);
+
+	if (NIOS_JTAG_WSPACE(st) == 0)
+		return -EAGAIN;
+
+	writel(c, &regs->data);
+
+	return 0;
 }
 
-static int altera_jtag_serial_tstc(void)
+static int altera_jtaguart_pending(struct udevice *dev, bool input)
 {
-	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	u32 st = readl(&regs->control);
+
+	if (input)
+		return st & NIOS_JTAG_RRDY;
+	else
+		return !(NIOS_JTAG_WSPACE(st) == NIOS_JTAG_WRITE_DEPTH);
 }
 
-static int altera_jtag_serial_getc(void)
+static int altera_jtaguart_getc(struct udevice *dev)
 {
-	int c;
-	unsigned val;
-
-	while (1) {
-		WATCHDOG_RESET ();
-		val = readl (&jtag->data);
-		if (val & NIOS_JTAG_RVALID)
-			break;
-	}
-	c = val & 0x0ff;
-	return (c);
-}
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+	u32 val;
 
-static struct serial_device altera_jtag_serial_drv = {
-	.name	= "altera_jtag_uart",
-	.start	= altera_jtag_serial_init,
-	.stop	= NULL,
-	.setbrg	= altera_jtag_serial_setbrg,
-	.putc	= altera_jtag_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= altera_jtag_serial_getc,
-	.tstc	= altera_jtag_serial_tstc,
-};
+	val = readl(&regs->data);
+
+	if (!(val & NIOS_JTAG_RVALID))
+		return -EAGAIN;
 
-void altera_jtag_serial_initialize(void)
+	return val & 0xff;
+}
+
+static int altera_jtaguart_probe(struct udevice *dev)
 {
-	serial_register(&altera_jtag_serial_drv);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->reg;
+
+#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
+	writel(NIOS_JTAG_AC, &regs->control); /* clear AC flag */
+#endif
+	return 0;
 }
 
-__weak struct serial_device *default_serial_console(void)
+static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
 {
-	return &altera_jtag_serial_drv;
+	struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
+
+	plat->reg = ioremap(dev_get_addr(dev),
+		sizeof(struct altera_jtaguart_regs));
+
+	return 0;
 }
+
+static const struct dm_serial_ops altera_jtaguart_ops = {
+	.putc = altera_jtaguart_putc,
+	.pending = altera_jtaguart_pending,
+	.getc = altera_jtaguart_getc,
+	.setbrg = altera_jtaguart_setbrg,
+};
+
+static const struct udevice_id altera_jtaguart_ids[] = {
+	{ .compatible = "altr,juart-1.0", },
+	{ }
+};
+
+U_BOOT_DRIVER(altera_jtaguart) = {
+	.name	= "altera_jtaguart",
+	.id	= UCLASS_SERIAL,
+	.of_match = altera_jtaguart_ids,
+	.ofdata_to_platdata = altera_jtaguart_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct altera_jtaguart_platdata),
+	.probe = altera_jtaguart_probe,
+	.ops	= &altera_jtaguart_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 66ad2f0..bd6d45c 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -23,14 +23,11 @@
 /*
  * SERIAL
  */
-#define CONFIG_ALTERA_JTAG_UART
 #if defined(CONFIG_ALTERA_JTAG_UART)
-# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_JTAG_UART_BASE
 #else
 # define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_UART_BASE
 #endif
 
-#define CONFIG_ALTERA_JTAG_UART_BYPASS
 #define CONFIG_SYS_NIOS_FIXEDBAUD
 #define CONFIG_BAUDRATE		CONFIG_SYS_UART_BAUD
 #define CONFIG_SYS_BAUDRATE_TABLE	{CONFIG_BAUDRATE}
-- 
2.1.4

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Marek Vasut]

On Friday, September 18, 2015 at 08:23:49 AM, Thomas Chou wrote:
> Convert altera_jtag_uart to driver model.
> 
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>

Acked-by: Marek Vasut <marex@denx.de>

btw I wonder if the ALTERA_JTAG_UART_BYPASS shouldn't be configured
from DT instead now. What do you think ?

Best regards,
Marek Vasut

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Hi Marek,

On 09/18/2015 10:58 PM, Marek Vasut wrote:
> btw I wonder if the ALTERA_JTAG_UART_BYPASS shouldn't be configured
> from DT instead now. What do you think ?

This feature is more like a switch between production and development. 
We would turn off the bypass to see every message the console output 
during development/debug. And turn on the bypass when there is no jtag 
connected in production. I would think a Kconfig option might better fit 
and keep the DT intact.

Best regards,
Thomas Chou

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Marek Vasut]

On Saturday, September 19, 2015 at 08:00:39 AM, Thomas Chou wrote:
> Hi Marek,

Hi,

> On 09/18/2015 10:58 PM, Marek Vasut wrote:
> > btw I wonder if the ALTERA_JTAG_UART_BYPASS shouldn't be configured
> > from DT instead now. What do you think ?
> 
> This feature is more like a switch between production and development.
> We would turn off the bypass to see every message the console output
> during development/debug. And turn on the bypass when there is no jtag
> connected in production. I would think a Kconfig option might better fit
> and keep the DT intact.

Well if there's no JTAG connected in production, why enable the device in
DT at all ?

Best regards,
Marek Vasut

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Hi Marek,

On 09/19/2015 02:10 PM, Marek Vasut wrote:
> Well if there's no JTAG connected in production, why enable the device in
> DT at all ?

Usually, it will be used for after service.

Best regards,
Thomas Chou

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Simon Glass]

Hi Thomas,

On 18 September 2015 at 00:23, Thomas Chou <thomas@wytron.com.tw> wrote:
>
> Convert altera_jtag_uart to driver model.
>
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
> ---
>
> v2
>   add ioremap.
>   make the change to dts compatible with linux.
>
> v3
>   use fdt address translation patch from Stefan Roese.
>   fix watchdog and loop as Marek suggested.
>
> v4
>   add clear AC flag to probe().
>   remove polling loops and watchdog reset because they are
>     done in the serial-uclass.c.
>
> v5
>   fix coding style as Marek suggested to altera_uart.
>
>  arch/nios2/dts/3c120_devboard.dts |   5 ++
>  configs/nios2-generic_defconfig   |   3 +
>  drivers/serial/Kconfig            |  13 ++++
>  drivers/serial/altera_jtag_uart.c | 145 ++++++++++++++++++++++----------------
>  include/configs/nios2-generic.h   |   3 -
>  5 files changed, 106 insertions(+), 63 deletions(-)

This looks right to me but I have some comments below.

Reviewed-by: Simon Glass <sjg@chromium.org>

>
> diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts
> index 02524ab..7f76328 100644
> --- a/arch/nios2/dts/3c120_devboard.dts
> +++ b/arch/nios2/dts/3c120_devboard.dts
> @@ -93,6 +93,7 @@
>                                 reg = <0x00004d50 0x00000008>;
>                                 interrupt-parent = <&cpu>;
>                                 interrupts = <1>;
> +                               u-boot,dm-pre-reloc;
>                         };
>
>                         tse_mac: ethernet at 0x4000 {
> @@ -147,6 +148,10 @@
>                 };
>         };
>
> +       aliases {
> +               console = &jtag_uart;

The normal way is to put this into the 'chosen' node, with the
property name stdout-path.

> +       };
> +
>         chosen {
>                 bootargs = "debug console=ttyJ0,115200";
>         };
> diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
> index 9c1bec5..9dc6a72 100644
> --- a/configs/nios2-generic_defconfig
> +++ b/configs/nios2-generic_defconfig
> @@ -1,4 +1,5 @@
>  CONFIG_NIOS2=y
> +CONFIG_DM_SERIAL=y
>  CONFIG_TARGET_NIOS2_GENERIC=y
>  CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
>  CONFIG_HUSH_PARSER=y
> @@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
>  CONFIG_OF_CONTROL=y
>  CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
> +CONFIG_ALTERA_JTAG_UART=y
> +CONFIG_ALTERA_JTAG_UART_BYPASS=y
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index ccb80d2..5a8cb3a 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -109,6 +109,19 @@ config DEBUG_UART_SHIFT
>           value. Use this value to specify the shift to use, where 0=byte
>           registers, 2=32-bit word registers, etc.
>
> +config ALTERA_JTAG_UART
> +       bool "Altera JTAG UART support"
> +       depends on NIOS2 && DM_SERIAL
> +       help
> +         Select this to enable an JTAG UART for Altera devices.

a JTAG UART

Is there anything else to say about it? Perhaps how it works? A link
to instructions on how to set it up?

> +
> +config ALTERA_JTAG_UART_BYPASS
> +       bool "Bypass output when no connection"
> +       depends on ALTERA_JTAG_UART
> +       help
> +         Bypass console output and keep going even if there is no
> +         JTAG terminal connection with the host.
> +
>  config ROCKCHIP_SERIAL
>         bool "Rockchip on-chip UART support"
>         depends on ARCH_UNIPHIER && DM_SERIAL
> diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
> index 9a81402..2c025bc 100644
> --- a/drivers/serial/altera_jtag_uart.c
> +++ b/drivers/serial/altera_jtag_uart.c
> @@ -6,98 +6,123 @@
>   */
>
>  #include <common.h>
> -#include <watchdog.h>
> +#include <dm.h>
> +#include <errno.h>
>  #include <asm/io.h>
>  #include <linux/compiler.h>
>  #include <serial.h>
>
> -typedef volatile struct {
> -       unsigned        data;                   /* Data register */
> -       unsigned        control;                /* Control register */
> -} nios_jtag_t;
> +struct altera_jtaguart_regs {
> +       u32     data;                   /* Data register */
> +       u32     control;                /* Control register */
> +};
> +
> +struct altera_jtaguart_platdata {
> +       struct altera_jtaguart_regs *reg;
> +};
>
>  /* data register */
>  #define NIOS_JTAG_RVALID       (1<<15)         /* Read valid */
> -#define NIOS_JTAG_DATA(d)      ((d)&0x0ff)     /* Read data */
> -#define NIOS_JTAG_RAVAIL(d)    ((d)>>16)       /* Read space avail */
>
>  /* control register */
> -#define NIOS_JTAG_RE           (1 << 0)        /* read intr enable */
> -#define NIOS_JTAG_WE           (1 << 1)        /* write intr enable */
> -#define NIOS_JTAG_RI           (1 << 8)        /* read intr pending */
> -#define NIOS_JTAG_WI           (1 << 9)        /* write intr pending*/
>  #define NIOS_JTAG_AC           (1 << 10)       /* activity indicator */
>  #define NIOS_JTAG_RRDY         (1 << 12)       /* read available */
>  #define NIOS_JTAG_WSPACE(d)    ((d)>>16)       /* Write space avail */
> +/* Write fifo size. FIXME: this should be extracted with sopc2dts */
> +#define NIOS_JTAG_WRITE_DEPTH  64
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> -/*------------------------------------------------------------------
> - * JTAG acts as the serial port
> - *-----------------------------------------------------------------*/
> -static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
> -
> -static void altera_jtag_serial_setbrg(void)
> -{
> -}
> -
> -static int altera_jtag_serial_init(void)
> +static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
>  {
>         return 0;
>  }
>
> -static void altera_jtag_serial_putc(char c)
> +static int altera_jtaguart_putc(struct udevice *dev, const char c)

While you are here, how abouve 'ch' instead of 'c' as it is easier to spot.

>  {
> -       while (1) {
> -               unsigned st = readl(&jtag->control);
> -               if (NIOS_JTAG_WSPACE(st))
> -                       break;
> +       struct altera_jtaguart_platdata *plat = dev->platdata;
> +       struct altera_jtaguart_regs *const regs = plat->reg;
> +       u32 st = readl(&regs->control);
> +
>  #ifdef CONFIG_ALTERA_JTAG_UART_BYPASS

It seems odd that you return this error when writing a character.
Don't you know whether the connection is valid in the probe() method?
Or are you trying to avoid an error at that stage?

> -               if (!(st & NIOS_JTAG_AC)) /* no connection */
> -                       return;
> +       if (!(st & NIOS_JTAG_AC)) /* no connection */
> +               return -ENETUNREACH;
>  #endif
> -               WATCHDOG_RESET();
> -       }
> -       writel ((unsigned char)c, &jtag->data);
> +
> +       if (NIOS_JTAG_WSPACE(st) == 0)
> +               return -EAGAIN;
> +
> +       writel(c, &regs->data);
> +
> +       return 0;
>  }
>
> -static int altera_jtag_serial_tstc(void)
> +static int altera_jtaguart_pending(struct udevice *dev, bool input)
>  {
> -       return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
> +       struct altera_jtaguart_platdata *plat = dev->platdata;
> +       struct altera_jtaguart_regs *const regs = plat->reg;
> +       u32 st = readl(&regs->control);
> +
> +       if (input)
> +               return st & NIOS_JTAG_RRDY;

I think this should be:

               return st & NIOS_JTAG_RRDY ? 1 : 0;

> +       else
> +               return !(NIOS_JTAG_WSPACE(st) == NIOS_JTAG_WRITE_DEPTH);
>  }
>
> -static int altera_jtag_serial_getc(void)
> +static int altera_jtaguart_getc(struct udevice *dev)
>  {
> -       int c;
> -       unsigned val;
> -
> -       while (1) {
> -               WATCHDOG_RESET ();
> -               val = readl (&jtag->data);
> -               if (val & NIOS_JTAG_RVALID)
> -                       break;
> -       }
> -       c = val & 0x0ff;
> -       return (c);
> -}
> +       struct altera_jtaguart_platdata *plat = dev->platdata;
> +       struct altera_jtaguart_regs *const regs = plat->reg;
> +       u32 val;
>
> -static struct serial_device altera_jtag_serial_drv = {
> -       .name   = "altera_jtag_uart",
> -       .start  = altera_jtag_serial_init,
> -       .stop   = NULL,
> -       .setbrg = altera_jtag_serial_setbrg,
> -       .putc   = altera_jtag_serial_putc,
> -       .puts   = default_serial_puts,
> -       .getc   = altera_jtag_serial_getc,
> -       .tstc   = altera_jtag_serial_tstc,
> -};
> +       val = readl(&regs->data);
> +
> +       if (!(val & NIOS_JTAG_RVALID))
> +               return -EAGAIN;
>
> -void altera_jtag_serial_initialize(void)
> +       return val & 0xff;
> +}
> +
> +static int altera_jtaguart_probe(struct udevice *dev)
>  {
> -       serial_register(&altera_jtag_serial_drv);
> +       struct altera_jtaguart_platdata *plat = dev->platdata;
> +       struct altera_jtaguart_regs *const regs = plat->reg;
> +
> +#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
> +       writel(NIOS_JTAG_AC, &regs->control); /* clear AC flag */
> +#endif
> +       return 0;
>  }
>
> -__weak struct serial_device *default_serial_console(void)
> +static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
>  {
> -       return &altera_jtag_serial_drv;
> +       struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
> +
> +       plat->reg = ioremap(dev_get_addr(dev),
> +               sizeof(struct altera_jtaguart_regs));

What is the ioremap() for? Is this because we don't support ranges
properly yet? If so, perhaps we can assume that will be fixed before
this is applied?

> +
> +       return 0;
>  }
> +
> +static const struct dm_serial_ops altera_jtaguart_ops = {
> +       .putc = altera_jtaguart_putc,
> +       .pending = altera_jtaguart_pending,
> +       .getc = altera_jtaguart_getc,
> +       .setbrg = altera_jtaguart_setbrg,
> +};
> +
> +static const struct udevice_id altera_jtaguart_ids[] = {
> +       { .compatible = "altr,juart-1.0", },
> +       { }
> +};
> +
> +U_BOOT_DRIVER(altera_jtaguart) = {
> +       .name   = "altera_jtaguart",
> +       .id     = UCLASS_SERIAL,
> +       .of_match = altera_jtaguart_ids,
> +       .ofdata_to_platdata = altera_jtaguart_ofdata_to_platdata,
> +       .platdata_auto_alloc_size = sizeof(struct altera_jtaguart_platdata),
> +       .probe = altera_jtaguart_probe,
> +       .ops    = &altera_jtaguart_ops,
> +       .flags = DM_FLAG_PRE_RELOC,
> +};
> diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
> index 66ad2f0..bd6d45c 100644
> --- a/include/configs/nios2-generic.h
> +++ b/include/configs/nios2-generic.h
> @@ -23,14 +23,11 @@
>  /*
>   * SERIAL
>   */
> -#define CONFIG_ALTERA_JTAG_UART
>  #if defined(CONFIG_ALTERA_JTAG_UART)
> -# define CONFIG_SYS_NIOS_CONSOLE       CONFIG_SYS_JTAG_UART_BASE
>  #else
>  # define CONFIG_SYS_NIOS_CONSOLE       CONFIG_SYS_UART_BASE
>  #endif
>
> -#define CONFIG_ALTERA_JTAG_UART_BYPASS
>  #define CONFIG_SYS_NIOS_FIXEDBAUD
>  #define CONFIG_BAUDRATE                CONFIG_SYS_UART_BAUD
>  #define CONFIG_SYS_BAUDRATE_TABLE      {CONFIG_BAUDRATE}
> --
> 2.1.4
>

Regards,
Simon

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Marek Vasut]

On Saturday, September 19, 2015 at 10:06:21 AM, Thomas Chou wrote:
> Hi Marek,
> 
> On 09/19/2015 02:10 PM, Marek Vasut wrote:
> > Well if there's no JTAG connected in production, why enable the device in
> > DT at all ?
> 
> Usually, it will be used for after service.

I see, thanks for clarifying :)

Best regards,
Marek Vasut

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Simon Glass]

Hi,

On 19 September 2015 at 09:46, Simon Glass <sjg@chromium.org> wrote:
> Hi Thomas,
>
> On 18 September 2015 at 00:23, Thomas Chou <thomas@wytron.com.tw> wrote:
>>
>> Convert altera_jtag_uart to driver model.
>>
>> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
>> ---
>>
>> v2
>>   add ioremap.
>>   make the change to dts compatible with linux.
>>
>> v3
>>   use fdt address translation patch from Stefan Roese.
>>   fix watchdog and loop as Marek suggested.
>>
>> v4
>>   add clear AC flag to probe().
>>   remove polling loops and watchdog reset because they are
>>     done in the serial-uclass.c.
>>
>> v5
>>   fix coding style as Marek suggested to altera_uart.
>>
>>  arch/nios2/dts/3c120_devboard.dts |   5 ++
>>  configs/nios2-generic_defconfig   |   3 +
>>  drivers/serial/Kconfig            |  13 ++++
>>  drivers/serial/altera_jtag_uart.c | 145 ++++++++++++++++++++++----------------
>>  include/configs/nios2-generic.h   |   3 -
>>  5 files changed, 106 insertions(+), 63 deletions(-)
>
> This looks right to me but I have some comments below.
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Actually I have one more comment - consider implementing
CONFIG_DEBUG_UART in this driver. That way you can have UART output
before driver model is ready.

Regards,
Simon

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Hi Simon,

On 09/19/2015 11:46 PM, Simon Glass wrote:
>>   {
>> -       while (1) {
>> -               unsigned st = readl(&jtag->control);
>> -               if (NIOS_JTAG_WSPACE(st))
>> -                       break;
>> +       struct altera_jtaguart_platdata *plat = dev->platdata;
>> +       struct altera_jtaguart_regs *const regs = plat->reg;
>> +       u32 st = readl(&regs->control);
>> +
>>   #ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
>
> It seems odd that you return this error when writing a character.
> Don't you know whether the connection is valid in the probe() method?
> Or are you trying to avoid an error at that stage?

The console output will resume once the JTAG terminal is connected. 
Before that the output is skipped.

Without the bypass, the console output will wait forever until a JTAG 
terminal is connected. You will see every message the console output.

>> +       plat->reg = ioremap(dev_get_addr(dev),
>> +               sizeof(struct altera_jtaguart_regs));
>
> What is the ioremap() for? Is this because we don't support ranges
> properly yet? If so, perhaps we can assume that will be fixed before
> this is applied?

The reg address in dts file for nios2 linux is physical address. We will 
need to map it to uncached virtual address for the peripherals.

Most linux drivers use ioremap(), though it is rare on u-boot.

We do need the range translation, as there may be bridges to the 
peripherals.

Best regards,
Thomas Chou

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Hi Simon,

On 09/20/2015 05:55 AM, Simon Glass wrote:
>  Actually I have one more comment - consider implementing
> CONFIG_DEBUG_UART in this driver. That way you can have UART output
> before driver model is ready.

Thanks a lot for your helpful reviews and suggestions. I will add the 
early debug to both altera jtag uart and uart.

Best regards,
Thomas Chou

[U-Boot] [PATCH v5] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Hi Simon,

On 09/20/2015 11:22 AM, Thomas Chou wrote:
> Hi Simon,
>
> On 09/20/2015 05:55 AM, Simon Glass wrote:
>>  Actually I have one more comment - consider implementing
>> CONFIG_DEBUG_UART in this driver. That way you can have UART output
>> before driver model is ready.
>
> Thanks a lot for your helpful reviews and suggestions. I will add the
> early debug to both altera jtag uart and uart.

I added the early debug uart. But how can I test it?
Is there a DEBUG definition that I can test the output of early debug?

Best regards,
Thomas Chou

[U-Boot] [PATCH v6] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
v2
  add ioremap.
  make the change to dts compatible with linux.

v3
  use fdt address translation patch from Stefan Roese.
  fix watchdog and loop as Marek suggested.

v4
  add clear AC flag to probe().
  remove polling loops and watchdog reset because they are
    done in the serial-uclass.c.

v5
  fix coding style as Marek suggested to altera_uart.

v6
  add early debug uart.
  use chosen stdout-path to assign console.
  fix coding style as Simon suggested.

 arch/nios2/dts/3c120_devboard.dts |   2 +
 configs/nios2-generic_defconfig   |   3 +
 drivers/serial/Kconfig            |  26 ++++++
 drivers/serial/altera_jtag_uart.c | 171 +++++++++++++++++++++++++-------------
 include/configs/nios2-generic.h   |   3 -
 5 files changed, 142 insertions(+), 63 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts
index 02524ab..07bec69 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -93,6 +93,7 @@
 				reg = <0x00004d50 0x00000008>;
 				interrupt-parent = <&cpu>;
 				interrupts = <1>;
+				u-boot,dm-pre-reloc;
 			};
 
 			tse_mac: ethernet at 0x4000 {
@@ -149,5 +150,6 @@
 
 	chosen {
 		bootargs = "debug console=ttyJ0,115200";
+		stdout-path = &jtag_uart;
 	};
 };
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 9c1bec5..9dc6a72 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,4 +1,5 @@
 CONFIG_NIOS2=y
+CONFIG_DM_SERIAL=y
 CONFIG_TARGET_NIOS2_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
 CONFIG_HUSH_PARSER=y
@@ -14,3 +15,5 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_ALTERA_JTAG_UART=y
+CONFIG_ALTERA_JTAG_UART_BYPASS=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..10505dc 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -54,6 +54,13 @@ choice
 	prompt "Select which UART will provide the debug UART"
 	depends on DEBUG_UART
 
+config DEBUG_UART_ALTERA_JTAGUART
+	bool "Altera JTAG UART"
+	help
+	  Select this to enable a debug UART using the altera_jtag_uart driver.
+	  You will need to provide parameters to make this work. The driver will
+	  be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
 	bool "ns16550"
 	help
@@ -109,6 +116,25 @@ config DEBUG_UART_SHIFT
 	  value. Use this value to specify the shift to use, where 0=byte
 	  registers, 2=32-bit word registers, etc.
 
+config ALTERA_JTAG_UART
+	bool "Altera JTAG UART support"
+	depends on DM_SERIAL
+	help
+	  Select this to enable an JTAG UART for Altera devices.The JTAG UART
+	  core implements a method to communicate serial character streams
+	  between a host PC and a Qsys system on an Altera FPGA. Please find
+	  details on the "Embedded Peripherals IP User Guide" of Altera.
+
+config ALTERA_JTAG_UART_BYPASS
+	bool "Bypass output when no connection"
+	depends on ALTERA_JTAG_UART
+	help
+	  Bypass console output and keep going even if there is no JTAG
+	  terminal connection with the host. The console output will resume
+	  once the JTAG terminal is connected. Without the bypass, the console
+	  output will wait forever until a JTAG terminal is connected. If you
+	  not are sure, say Y.
+
 config ROCKCHIP_SERIAL
 	bool "Rockchip on-chip UART support"
 	depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 9a81402..39d4a4e 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -6,98 +6,149 @@
  */
 
 #include <common.h>
-#include <watchdog.h>
+#include <dm.h>
+#include <errno.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
-typedef volatile struct {
-	unsigned	data;			/* Data register */
-	unsigned	control;		/* Control register */
-} nios_jtag_t;
+struct altera_jtaguart_regs {
+	u32	data;			/* Data register */
+	u32	control;		/* Control register */
+};
+
+struct altera_jtaguart_platdata {
+	struct altera_jtaguart_regs *regs;
+};
 
 /* data register */
-#define NIOS_JTAG_RVALID	(1<<15)		/* Read valid */
-#define NIOS_JTAG_DATA(d)	((d)&0x0ff)	/* Read data */
-#define NIOS_JTAG_RAVAIL(d)	((d)>>16)	/* Read space avail */
+#define ALTERA_JTAG_RVALID	(1<<15)		/* Read valid */
 
 /* control register */
-#define NIOS_JTAG_RE		(1 << 0)	/* read intr enable */
-#define NIOS_JTAG_WE		(1 << 1)	/* write intr enable */
-#define NIOS_JTAG_RI		(1 << 8)	/* read intr pending */
-#define NIOS_JTAG_WI		(1 << 9)	/* write intr pending*/
-#define NIOS_JTAG_AC		(1 << 10)	/* activity indicator */
-#define NIOS_JTAG_RRDY		(1 << 12)	/* read available */
-#define NIOS_JTAG_WSPACE(d)	((d)>>16)	/* Write space avail */
+#define ALTERA_JTAG_AC		(1 << 10)	/* activity indicator */
+#define ALTERA_JTAG_RRDY	(1 << 12)	/* read available */
+#define ALTERA_JTAG_WSPACE(d)	((d)>>16)	/* Write space avail */
+/* Write fifo size. FIXME: this should be extracted with sopc2dts */
+#define ALTERA_JTAG_WRITE_DEPTH	64
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-static void altera_jtag_serial_setbrg(void)
+static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
 {
+	return 0;
 }
 
-static int altera_jtag_serial_init(void)
+static int altera_jtaguart_putc(struct udevice *dev, const char ch)
 {
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->regs;
+	u32 st = readl(&regs->control);
+
+#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
+	if (!(st & ALTERA_JTAG_AC)) /* no connection yet */
+		return -ENETUNREACH;
+#endif
+
+	if (ALTERA_JTAG_WSPACE(st) == 0)
+		return -EAGAIN;
+
+	writel(ch, &regs->data);
+
 	return 0;
 }
 
-static void altera_jtag_serial_putc(char c)
+static int altera_jtaguart_pending(struct udevice *dev, bool input)
 {
-	while (1) {
-		unsigned st = readl(&jtag->control);
-		if (NIOS_JTAG_WSPACE(st))
-			break;
-#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
-		if (!(st & NIOS_JTAG_AC)) /* no connection */
-			return;
-#endif
-		WATCHDOG_RESET();
-	}
-	writel ((unsigned char)c, &jtag->data);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->regs;
+	u32 st = readl(&regs->control);
+
+	if (input)
+		return st & ALTERA_JTAG_RRDY ? 1 : 0;
+	else
+		return !(ALTERA_JTAG_WSPACE(st) == ALTERA_JTAG_WRITE_DEPTH);
 }
 
-static int altera_jtag_serial_tstc(void)
+static int altera_jtaguart_getc(struct udevice *dev)
 {
-	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->regs;
+	u32 val;
+
+	val = readl(&regs->data);
+
+	if (!(val & ALTERA_JTAG_RVALID))
+		return -EAGAIN;
+
+	return val & 0xff;
 }
 
-static int altera_jtag_serial_getc(void)
+static int altera_jtaguart_probe(struct udevice *dev)
 {
-	int c;
-	unsigned val;
+#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
+	struct altera_jtaguart_platdata *plat = dev->platdata;
+	struct altera_jtaguart_regs *const regs = plat->regs;
 
-	while (1) {
-		WATCHDOG_RESET ();
-		val = readl (&jtag->data);
-		if (val & NIOS_JTAG_RVALID)
-			break;
-	}
-	c = val & 0x0ff;
-	return (c);
+	writel(ALTERA_JTAG_AC, &regs->control); /* clear AC flag */
+#endif
+	return 0;
+}
+
+static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)
+{
+	struct altera_jtaguart_platdata *plat = dev_get_platdata(dev);
+
+	plat->regs = ioremap(dev_get_addr(dev),
+		sizeof(struct altera_jtaguart_regs));
+
+	return 0;
 }
 
-static struct serial_device altera_jtag_serial_drv = {
-	.name	= "altera_jtag_uart",
-	.start	= altera_jtag_serial_init,
-	.stop	= NULL,
-	.setbrg	= altera_jtag_serial_setbrg,
-	.putc	= altera_jtag_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= altera_jtag_serial_getc,
-	.tstc	= altera_jtag_serial_tstc,
+static const struct dm_serial_ops altera_jtaguart_ops = {
+	.putc = altera_jtaguart_putc,
+	.pending = altera_jtaguart_pending,
+	.getc = altera_jtaguart_getc,
+	.setbrg = altera_jtaguart_setbrg,
+};
+
+static const struct udevice_id altera_jtaguart_ids[] = {
+	{ .compatible = "altr,juart-1.0", },
+	{ }
+};
+
+U_BOOT_DRIVER(altera_jtaguart) = {
+	.name	= "altera_jtaguart",
+	.id	= UCLASS_SERIAL,
+	.of_match = altera_jtaguart_ids,
+	.ofdata_to_platdata = altera_jtaguart_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct altera_jtaguart_platdata),
+	.probe = altera_jtaguart_probe,
+	.ops	= &altera_jtaguart_ops,
+	.flags = DM_FLAG_PRE_RELOC,
 };
 
-void altera_jtag_serial_initialize(void)
+#ifdef CONFIG_DEBUG_UART_ALTERA_JTAGUART
+
+#include <debug_uart.h>
+
+void debug_uart_init(void)
 {
-	serial_register(&altera_jtag_serial_drv);
 }
 
-__weak struct serial_device *default_serial_console(void)
+static inline void _debug_uart_putc(int ch)
 {
-	return &altera_jtag_serial_drv;
+	struct altera_jtaguart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
+
+	while (1) {
+		u32 st = readl(&regs->control);
+
+		if (ALTERA_JTAG_WSPACE(st))
+			break;
+	}
+
+	writel(ch, &regs->data);
 }
+
+DEBUG_UART_FUNCS
+
+#endif
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 66ad2f0..bd6d45c 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -23,14 +23,11 @@
 /*
  * SERIAL
  */
-#define CONFIG_ALTERA_JTAG_UART
 #if defined(CONFIG_ALTERA_JTAG_UART)
-# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_JTAG_UART_BASE
 #else
 # define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_UART_BASE
 #endif
 
-#define CONFIG_ALTERA_JTAG_UART_BYPASS
 #define CONFIG_SYS_NIOS_FIXEDBAUD
 #define CONFIG_BAUDRATE		CONFIG_SYS_UART_BAUD
 #define CONFIG_SYS_BAUDRATE_TABLE	{CONFIG_BAUDRATE}
-- 
2.1.4

[U-Boot] [PATCH v6] nios2: convert altera_jtag_uart to driver model

[Thomas Chou]

On 09/20/2015 04:36 PM, Thomas Chou wrote:
> Convert altera_jtag_uart to driver model.
>
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
> Acked-by: Marek Vasut <marex@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> v2
>    add ioremap.
>    make the change to dts compatible with linux.
>
> v3
>    use fdt address translation patch from Stefan Roese.
>    fix watchdog and loop as Marek suggested.
>
> v4
>    add clear AC flag to probe().
>    remove polling loops and watchdog reset because they are
>      done in the serial-uclass.c.
>
> v5
>    fix coding style as Marek suggested to altera_uart.
>
> v6
>    add early debug uart.
>    use chosen stdout-path to assign console.
>    fix coding style as Simon suggested.
>
>   arch/nios2/dts/3c120_devboard.dts |   2 +
>   configs/nios2-generic_defconfig   |   3 +
>   drivers/serial/Kconfig            |  26 ++++++
>   drivers/serial/altera_jtag_uart.c | 171 +++++++++++++++++++++++++-------------
>   include/configs/nios2-generic.h   |   3 -
>   5 files changed, 142 insertions(+), 63 deletions(-)

Applied to u-boot-nios.