From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Fri, 25 Sep 2015 07:45:12 -0700 Subject: [U-Boot] [Patch V3 11/16] ARMv8/FSL_LSCH2: Add FSL_LSCH2 SoC In-Reply-To: <1443184329-48536-12-git-send-email-Qianyu.Gong@freescale.com> References: <1443184329-48536-1-git-send-email-Qianyu.Gong@freescale.com> <1443184329-48536-12-git-send-email-Qianyu.Gong@freescale.com> Message-ID: <56055DF8.1030600@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 09/25/2015 05:32 AM, Gong Qianyu wrote: > From: Mingkai Hu > > Freescale LayerScape with Chassis Generation 2 is a set of SoCs with > ARMv8 cores and 2rd generation of Chassis. > > Signed-off-by: Li Yang > Signed-off-by: Hou Zhiqiang > Signed-off-by: Mingkai Hu > Signed-off-by: Gong Qianyu > --- > V3: > - Update MMU table initialization to match the latest code. > - Remove some dead code > - Rename #include to #include > > arch/arm/cpu/armv8/Makefile | 1 + > arch/arm/cpu/armv8/fsl-lsch2/Makefile | 12 + > arch/arm/cpu/armv8/fsl-lsch2/README | 10 + > arch/arm/cpu/armv8/fsl-lsch2/cpu.c | 527 ++++++++++++++++++++++ NACK. Do NOT duplicate massive code. Please consolidate fsl-lsch3 and fsl-lsc2 and move common code out. York