From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Chou Date: Tue, 29 Sep 2015 15:18:05 +0800 Subject: [U-Boot] [PATCH v2] nios2: convert nios2 cpu to driver model In-Reply-To: <201509290445.28107.marex@denx.de> References: <1443400318-19151-1-git-send-email-thomas@wytron.com.tw> <1443490081-19526-1-git-send-email-thomas@wytron.com.tw> <201509290445.28107.marex@denx.de> Message-ID: <560A3B2D.9000404@wytron.com.tw> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Marek, On 09/29/2015 10:45 AM, Marek Vasut wrote: >> --- a/arch/Kconfig >> +++ b/arch/Kconfig >> @@ -64,6 +64,9 @@ config NIOS2 >> select HAVE_GENERIC_BOARD >> select SYS_GENERIC_BOARD >> select SUPPORT_OF_CONTROL >> + select OF_CONTROL >> + select DM >> + select CPU > > What's this CONFIG_CPU for please ? drivers/cpu/Kconfig It is "Enable CPU drivers using Driver Model". I think it should have been named as CONFIG_DM_CPU to avoid confusion. >> -int arch_cpu_init(void) >> +int arch_cpu_init_dm(void) >> { >> - gd->cpu_clk = CONFIG_SYS_CLK_FREQ; >> + struct udevice *dev; >> + >> + uclass_first_device(UCLASS_CPU, &dev); >> + if (!dev) >> + return -ENODEV; >> + >> + gd->cpu_clk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "clock-frequency", 0); >> + gd->arch.dcache_line_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "dcache-line-size", 0); >> + gd->arch.icache_line_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "icache-line-size", 0); >> + gd->arch.dcache_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "dcache-size", 0); >> + gd->arch.icache_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "icache-size", 0); >> + gd->arch.reset_addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "altr,reset-addr", 0); >> + gd->arch.exception_addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "altr,exception-addr", 0); >> + gd->arch.has_mmu = fdtdec_get_int(gd->fdt_blob, dev->of_offset, >> + "altr,has-mmu", 0); > > Shouldn't there be some sort of return value checking here ? There might be some. Though I would like to depend upon the sopc2dts which generates the dts. I don't think these values should be tweaked by a human. :) > >> + info->features = 1 << CPU_FEAT_L1_CACHE >> + | (gd->arch.has_mmu ? 1 << CPU_FEAT_MMU : 0); > > I'd add parenthesis around the bitshifts, for the sake of clarity. > Also, please put the ORR operator at the end of the line. Will do as suggested. Thanks a lot for your review. Best regards, Thomas Chou