From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sinan Akman Date: Wed, 30 Sep 2015 15:09:41 -0400 Subject: [U-Boot] [ANN] U-Boot v2015.10-rc4 released In-Reply-To: References: <20150928210901.GH22966@bill-the-cat> <560C1233.3000300@writeme.com> <560C18FC.2000501@freescale.com> <560C1A4D.3070509@writeme.com> <560C23B5.7060104@writeme.com> <560C2AFF.4080502@writeme.com> Message-ID: <560C3375.3090209@writeme.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Fabio Estevam wrote: > On Wed, Sep 30, 2015 at 3:56 PM, Fabio Estevam wrote: >> On Wed, Sep 30, 2015 at 3:33 PM, Sinan Akman wrote: >> >>> Nope, AFAICS it doesn't make any difference. >> Ok, the issue is due to endianness: on LS1021 the watchdog is >> big-endian, so that's why we can't use clrsetbits_le16(). >> >> Please check: >> http://git.freescale.com/git/cgit.cgi/layerscape/ls1021a/linux.git/commit/?id=b53a344d20f6ffdc383d990a9636efb53ce272a9 >> >> What about this? >> >> --- a/drivers/watchdog/imx_watchdog.c >> +++ b/drivers/watchdog/imx_watchdog.c >> @@ -54,8 +54,11 @@ void hw_watchdog_init(void) >> void reset_cpu(ulong addr) >> { >> struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; >> + int reg; > > ops, this should be u16 instead. > >> - clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); >> + reg = readw(&wdog->wcr); >> + reg |= WCR_WDE; >> + writew(reg, &wdog->wcr); >> >> writew(0x5555, &wdog->wsr); >> writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ > OK, this will probably work, as I tried writew earlier and it worked, I agree it seems an endianness issue, do we not want to address all common accesses in a way that takes endianness into account ? I'll test the above as well (with u16 reg) to make sure. Regards Sinan Akman