* [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes
@ 2015-10-08 20:22 Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 1/2] sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz Siarhei Siamashka
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Siarhei Siamashka @ 2015-10-08 20:22 UTC (permalink / raw)
To: u-boot
Fixes for DRAM reliability problems and unsafe use of the PH6 pin.
Siarhei Siamashka (2):
sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz
sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig
configs/Linksprite_pcDuino_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.4.9
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 1/2] sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz
2015-10-08 20:22 [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Siarhei Siamashka
@ 2015-10-08 20:22 ` Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 2/2] sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig Siarhei Siamashka
2015-10-10 10:12 ` [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Hans de Goede
2 siblings, 0 replies; 4+ messages in thread
From: Siarhei Siamashka @ 2015-10-08 20:22 UTC (permalink / raw)
To: u-boot
Linksprite_pcDuino_defconfig is a generic config for pcDuino1 and
pcDuino2 boards. The pcDuino2 board exists at least in two variants
(with DDR3 chips from HYNIX or NANYA). At least one pcDuino2 board
with HYNIX DDR3 fails the lima-memtester reliability test unless
the DRAM clock speed is reduced to 360MHz.
A detailed analysis report, generated by the a10-tpr3-scan tool with
the explanations why the DRAM is failing at 408MHz, is available at:
http://linux-sunxi.org/index.php?title=User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test&oldid=15152
http://web.archive.org/web/20151008190210/http://linux-sunxi.org/User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
---
configs/Linksprite_pcDuino_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index de44890..68d9137 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
-CONFIG_DRAM_CLK=408
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
--
2.4.9
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 2/2] sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig
2015-10-08 20:22 [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 1/2] sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz Siarhei Siamashka
@ 2015-10-08 20:22 ` Siarhei Siamashka
2015-10-10 10:12 ` [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Hans de Goede
2 siblings, 0 replies; 4+ messages in thread
From: Siarhei Siamashka @ 2015-10-08 20:22 UTC (permalink / raw)
To: u-boot
The pcDuino1 board unconditionally provides 5V to USB host
receptacles. The pcDuino2 board has a voltage regulator,
controlled by the PD2 pin which is pulled-up by default
(so that the USB power is also enabled by default).
Not specifying pins for enabling USB power in the defconfig
means that the PH3 and PH6 pins are driven high by default.
The PH6 pin is available on the Arduino-compatible expansion
header and touching it is not nice (this may be even dangerous,
depending on what kind of role is assigned to this particular
pin by various Arduino shields).
This patch explicitly configures the USB VBUS pins to "",
which means that no pins should be touched. The patch has
been tested on a pcDuino2 board and USB still works.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
---
configs/Linksprite_pcDuino_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index 68d9137..13b7ed3 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
+CONFIG_USB1_VBUS_PIN=""
+CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
--
2.4.9
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes
2015-10-08 20:22 [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 1/2] sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 2/2] sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig Siarhei Siamashka
@ 2015-10-10 10:12 ` Hans de Goede
2 siblings, 0 replies; 4+ messages in thread
From: Hans de Goede @ 2015-10-10 10:12 UTC (permalink / raw)
To: u-boot
Hi,
On 08-10-15 22:22, Siarhei Siamashka wrote:
> Fixes for DRAM reliability problems and unsafe use of the PH6 pin.
Thanks, I've applied this to the u-boot-sunxi tree, and I've
send out a pull-req so that we can hoepfully still get
these fixes into v2015.10
Regards,
Hans
^ permalink raw reply [flat|nested] 4+ messages in thread
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2015-10-08 20:22 [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 1/2] sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz Siarhei Siamashka
2015-10-08 20:22 ` [U-Boot] [PATCH 2/2] sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig Siarhei Siamashka
2015-10-10 10:12 ` [U-Boot] [PATCH 0/2] sunxi: Linksprite_pcDuino_defconfig bugfixes Hans de Goede
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