From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Chou Date: Sun, 11 Oct 2015 08:38:35 +0800 Subject: [U-Boot] [PATCH] nios2: convert cache flush to use dm cpu data In-Reply-To: <201510102018.00580.marex@denx.de> References: <1444119600-31999-1-git-send-email-thomas@wytron.com.tw> <5618A861.5020409@wytron.com.tw> <5618B0E9.5030509@wytron.com.tw> <201510102018.00580.marex@denx.de> Message-ID: <5619AF8B.7040306@wytron.com.tw> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Marek, On 10/11/2015 02:18 AM, Marek Vasut wrote: > Then you'd also need means to allocate variables to aligned memory location > to prevent invalid cache flush. (Linux does this with it's DMA API). We are > much simpler and thus this abstraction is still not available. I wonder if > the overhead of DMA API would be high or not for U-Boot. I see most people use memalign(ARCH_DMA_MINALIGN, len) in u-boot to allocate DMA buffers so that they are cache aligned. > It is even worse if the cache flush operators permit incorrect cache flushes > or invalidations. Like I mentioned before, this can lead to hard to debug > problems when using DMA (at least on ARM). I would suggest debug check should be left as for debug only. The definition of common functions should be kept as it is more important than coding style. I debugged DMA issues a lot in the past until I realized the importance of aligned buffers. So there should be a developer's guideline. But it is even much more difficult when something you believed does not work as expected, what is taken as common sense. It will trap a lot of developers when they called your flush cache functions but was skipped just because, eg, the end of packets are not aligned which is usually the case. I would suggest that, with the best of my knowledge, please change the range check to a debug probe, and restore the cache flush functions to the common definition. Best regards, Thomas