* [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions
@ 2015-09-16 10:22 Horia Geantă
2015-10-14 20:54 ` York Sun
2015-10-15 11:21 ` [U-Boot] [PATCH v2] " Horia Geantă
0 siblings, 2 replies; 5+ messages in thread
From: Horia Geantă @ 2015-09-16 10:22 UTC (permalink / raw)
To: u-boot
Enable snooping for CAAM read & write transactions by
programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP]
SCFG_SNPCNFGCR[SECWRSNP]
Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
board/freescale/ls1021aqds/ls1021aqds.c | 2 ++
board/freescale/ls1021atwr/ls1021atwr.c | 2 ++
3 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 60aa0d3b6f43..fbd06bafce31 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -144,6 +144,7 @@ struct ccsr_gur {
};
#define SCFG_ETSECDMAMCR_LE_BD_FR 0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR 0xc0000000
#define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
#define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
#define SCFG_ETSECCMCR_GE1_CLK125 0x08000000
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 655fc644fe90..e7c25a5012f0 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -281,6 +281,8 @@ int board_early_init_f(void)
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
unsigned int major;
+ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
#ifdef CONFIG_TSEC_ENET
/* clear BD & FR bits for BE BD's and frame data */
clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 228dbf81bb25..e15999e42165 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -482,6 +482,8 @@ int board_early_init_f(void)
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
unsigned int major;
+ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
#ifdef CONFIG_TSEC_ENET
/* clear BD & FR bits for BE BD's and frame data */
clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
--
2.4.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions
2015-09-16 10:22 [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions Horia Geantă
@ 2015-10-14 20:54 ` York Sun
2015-10-15 10:13 ` Horia Geantă
2015-10-15 11:21 ` [U-Boot] [PATCH v2] " Horia Geantă
1 sibling, 1 reply; 5+ messages in thread
From: York Sun @ 2015-10-14 20:54 UTC (permalink / raw)
To: u-boot
On 09/16/2015 03:22 AM, Horia Geant? wrote:
> Enable snooping for CAAM read & write transactions by
> programming the SCFG snoop configuration register:
> SCFG_SNPCNFGCR[SECRDSNP]
> SCFG_SNPCNFGCR[SECWRSNP]
>
> Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
The Reviewed-by signature should be added by reviewer or maintainer.
> ---
> arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
> board/freescale/ls1021aqds/ls1021aqds.c | 2 ++
> board/freescale/ls1021atwr/ls1021atwr.c | 2 ++
> 3 files changed, 5 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> index 60aa0d3b6f43..fbd06bafce31 100644
> --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> @@ -144,6 +144,7 @@ struct ccsr_gur {
> };
>
> #define SCFG_ETSECDMAMCR_LE_BD_FR 0x00000c00
> +#define SCFG_SNPCNFGCR_SEC_RD_WR 0xc0000000
> #define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
> #define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
> #define SCFG_ETSECCMCR_GE1_CLK125 0x08000000
> diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
> index 655fc644fe90..e7c25a5012f0 100644
> --- a/board/freescale/ls1021aqds/ls1021aqds.c
> +++ b/board/freescale/ls1021aqds/ls1021aqds.c
> @@ -281,6 +281,8 @@ int board_early_init_f(void)
> struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
> unsigned int major;
>
> + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
> +
> #ifdef CONFIG_TSEC_ENET
> /* clear BD & FR bits for BE BD's and frame data */
> clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
> diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
> index 228dbf81bb25..e15999e42165 100644
> --- a/board/freescale/ls1021atwr/ls1021atwr.c
> +++ b/board/freescale/ls1021atwr/ls1021atwr.c
> @@ -482,6 +482,8 @@ int board_early_init_f(void)
> struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
> unsigned int major;
>
> + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
> +
> #ifdef CONFIG_TSEC_ENET
> /* clear BD & FR bits for BE BD's and frame data */
> clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
>
Why wasn't the change put into arch_cpu_init?
York
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions
2015-10-14 20:54 ` York Sun
@ 2015-10-15 10:13 ` Horia Geantă
0 siblings, 0 replies; 5+ messages in thread
From: Horia Geantă @ 2015-10-15 10:13 UTC (permalink / raw)
To: u-boot
On 10/14/2015 11:54 PM, York Sun wrote:
>
>
> On 09/16/2015 03:22 AM, Horia Geant? wrote:
>> Enable snooping for CAAM read & write transactions by
>> programming the SCFG snoop configuration register:
>> SCFG_SNPCNFGCR[SECRDSNP]
>> SCFG_SNPCNFGCR[SECWRSNP]
>>
>> Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
>> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
>
> The Reviewed-by signature should be added by reviewer or maintainer.
It was added by Jason during an internal review.
Sorry for not adding him in Cc.
>> ---
>> arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
>> board/freescale/ls1021aqds/ls1021aqds.c | 2 ++
>> board/freescale/ls1021atwr/ls1021atwr.c | 2 ++
>> 3 files changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
>> index 60aa0d3b6f43..fbd06bafce31 100644
>> --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
>> +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
>> @@ -144,6 +144,7 @@ struct ccsr_gur {
>> };
>>
>> #define SCFG_ETSECDMAMCR_LE_BD_FR 0x00000c00
>> +#define SCFG_SNPCNFGCR_SEC_RD_WR 0xc0000000
>> #define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
>> #define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
>> #define SCFG_ETSECCMCR_GE1_CLK125 0x08000000
>> diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
>> index 655fc644fe90..e7c25a5012f0 100644
>> --- a/board/freescale/ls1021aqds/ls1021aqds.c
>> +++ b/board/freescale/ls1021aqds/ls1021aqds.c
>> @@ -281,6 +281,8 @@ int board_early_init_f(void)
>> struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
>> unsigned int major;
>>
>> + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
>> +
>> #ifdef CONFIG_TSEC_ENET
>> /* clear BD & FR bits for BE BD's and frame data */
>> clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
>> diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
>> index 228dbf81bb25..e15999e42165 100644
>> --- a/board/freescale/ls1021atwr/ls1021atwr.c
>> +++ b/board/freescale/ls1021atwr/ls1021atwr.c
>> @@ -482,6 +482,8 @@ int board_early_init_f(void)
>> struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
>> unsigned int major;
>>
>> + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
>> +
>> #ifdef CONFIG_TSEC_ENET
>> /* clear BD & FR bits for BE BD's and frame data */
>> clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
>>
>
> Why wasn't the change put into arch_cpu_init?
Good point.
I'll make the update in v2.
Thanks,
Horia
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: ls102xa: enable snooping for CAAM transactions
2015-09-16 10:22 [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions Horia Geantă
2015-10-14 20:54 ` York Sun
@ 2015-10-15 11:21 ` Horia Geantă
2015-10-30 16:17 ` York Sun
1 sibling, 1 reply; 5+ messages in thread
From: Horia Geantă @ 2015-10-15 11:21 UTC (permalink / raw)
To: u-boot
Enable snooping for CAAM read & write transactions by
programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP]
SCFG_SNPCNFGCR[SECWRSNP]
Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
---
v2 - moved initialization in arch_cpu_init (instead of board_early_init_f),
as suggested by York.
arch/arm/cpu/armv7/ls102xa/cpu.c | 3 +++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index 8dd95d98791d..0f10ed656af8 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -299,6 +299,7 @@ int arch_cpu_init(void)
void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
void *rcpm2_base =
(void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET);
+ struct ccsr_scfg *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
u32 state;
/*
@@ -326,6 +327,8 @@ int arch_cpu_init(void)
*/
fsl_epu_clean(epu_base);
+ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 60aa0d3b6f43..fbd06bafce31 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -144,6 +144,7 @@ struct ccsr_gur {
};
#define SCFG_ETSECDMAMCR_LE_BD_FR 0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR 0xc0000000
#define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
#define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
#define SCFG_ETSECCMCR_GE1_CLK125 0x08000000
--
2.4.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: ls102xa: enable snooping for CAAM transactions
2015-10-15 11:21 ` [U-Boot] [PATCH v2] " Horia Geantă
@ 2015-10-30 16:17 ` York Sun
0 siblings, 0 replies; 5+ messages in thread
From: York Sun @ 2015-10-30 16:17 UTC (permalink / raw)
To: u-boot
On 10/15/2015 04:21 AM, Horia Geant? wrote:
> Enable snooping for CAAM read & write transactions by
> programming the SCFG snoop configuration register:
> SCFG_SNPCNFGCR[SECRDSNP]
> SCFG_SNPCNFGCR[SECWRSNP]
>
> Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
> ---
>
> v2 - moved initialization in arch_cpu_init (instead of board_early_init_f),
> as suggested by York.
Applied to u-boot-fsl-qoriq. Awaiting upstream. Thanks.
York
^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-09-16 10:22 [U-Boot] [PATCH] arm: ls102xa: enable snooping for CAAM transactions Horia Geantă
2015-10-14 20:54 ` York Sun
2015-10-15 10:13 ` Horia Geantă
2015-10-15 11:21 ` [U-Boot] [PATCH v2] " Horia Geantă
2015-10-30 16:17 ` York Sun
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