From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Chou Date: Mon, 19 Oct 2015 16:18:06 +0800 Subject: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned In-Reply-To: <20151019075225.1363f49f@lilith> References: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw> <1444627783-15105-1-git-send-email-thomas@wytron.com.tw> <201510121232.56484.marex@denx.de> <561BADA7.1050008@wytron.com.tw> <20151019075225.1363f49f@lilith> Message-ID: <5624A73E.4010705@wytron.com.tw> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Albert, On 10/19/2015 01:52 PM, Albert ARIBAUD wrote: > Not sure I'm getting this, so for my own education: what prevents from > invalidating the cache, or IOW, what would happen if it was invalidated > at this point rather than flushed? This is a hardware limitation. The nios2 cpu with 4 bytes dcache line size does not support the initda instruction, which is needed to invalidate dcache. Recently we added a check, if the nios2 cpu support initda instruction, then we use invalidate_dcache, otherwise we use flush_dcache. Best regards, Thomas