From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Wed, 21 Oct 2015 10:37:34 -0600 Subject: [U-Boot] [PATCH] ARM: tegra210: implement PLLE init procedure from TRM In-Reply-To: <1444085933-30034-1-git-send-email-swarren@wwwdotorg.org> References: <1444085933-30034-1-git-send-email-swarren@wwwdotorg.org> Message-ID: <5627BF4E.9030705@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/05/2015 04:58 PM, Stephen Warren wrote: > From: Stephen Warren > > Implement the procedure that the TRM mandates to initialize PLLREFE and > PLLE. This makes the PLL actually lock. > > Note that this section of the TRM is being cleaned up to remove some > confusion. The set of register accesses in this patch should be final, > although the step numbers/descriptions might still change. Tom, Is this patch OK? I assume it can be applied now the merge window is over?