[U-Boot] [PATCH 1/2] ARM: tegra: add PCI to Tegra210 SoC DT

[U-Boot] [PATCH 1/2] ARM: tegra: add PCI to Tegra210 SoC DT

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

Tegra210's PCI controller is largely identical to Tegra124, and hence
shares the same binding. However, it has a unique compatible value due
to the existence of at least one new HW bug that would prevent any driver
for a previous HW version from operating correctly.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
For this series to operate correctly, it relies on my previous patches for:
- fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
- net: rtl8169: Build warning fixes for 64-bit
  (Compile warning only)
- Enabling CONFIG_SYS_NONCACHED_MEMORY
- ARM: tegra210: implement PLLE init procedure from TRM
- Tegra210 XUSB padctl support
- Tegra210 PCI controller support

 arch/arm/dts/tegra210.dtsi | 66 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi
index f3874a114150..a8c2f1994ff7 100644
--- a/arch/arm/dts/tegra210.dtsi
+++ b/arch/arm/dts/tegra210.dtsi
@@ -12,6 +12,72 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	pcie-controller at 0,01003000 {
+		compatible = "nvidia,tegra210-pcie";
+		device_type = "pci";
+		reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
+		       0x0 0x01003800 0x0 0x00000800   /* AFI registers */
+		       0x0 0x02000000 0x0 0x10000000>; /* configuration space */
+		reg-names = "pads", "afi", "cs";
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
+			     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+		interrupt-names = "intr", "msi";
+
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 0>;
+		interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
+		bus-range = <0x00 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000   /* port 0 configuration space */
+			  0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000   /* port 1 configuration space */
+			  0x81000000 0 0x0        0x0 0x12000000 0 0x00010000   /* downstream I/O (64 KiB) */
+			  0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000   /* non-prefetchable memory (208 MiB) */
+			  0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
+
+		clocks = <&tegra_car TEGRA210_CLK_PCIE>,
+			 <&tegra_car TEGRA210_CLK_AFI>,
+			 <&tegra_car TEGRA210_CLK_PLL_E>,
+			 <&tegra_car TEGRA210_CLK_CML0>;
+		clock-names = "pex", "afi", "pll_e", "cml";
+		resets = <&tegra_car 70>,
+			 <&tegra_car 72>,
+			 <&tegra_car 74>;
+		reset-names = "pex", "afi", "pcie_x";
+		status = "disabled";
+
+		phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
+		phy-names = "pcie";
+
+		pci at 1,0 {
+			device_type = "pci";
+			assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
+			reg = <0x000800 0 0 0 0>;
+			status = "disabled";
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges;
+
+			nvidia,num-lanes = <4>;
+		};
+
+		pci at 2,0 {
+			device_type = "pci";
+			assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
+			reg = <0x001000 0 0 0 0>;
+			status = "disabled";
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges;
+
+			nvidia,num-lanes = <1>;
+		};
+	};
+
 	gic: interrupt-controller at 0,50041000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;
-- 
1.9.1

[U-Boot] [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/dts/tegra210-p2371-2180.dts | 50 ++++++++++++++++++++++++++++++++++++
 board/nvidia/p2371-2180/p2371-2180.c | 30 ++++++++++++++++++++++
 include/configs/p2371-2180.h         | 10 ++++++++
 3 files changed, 90 insertions(+)

diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts
index 5d9adcff31c3..bf35497d83f7 100644
--- a/arch/arm/dts/tegra210-p2371-2180.dts
+++ b/arch/arm/dts/tegra210-p2371-2180.dts
@@ -21,6 +21,56 @@
 		reg = <0x0 0x80000000 0x0 0xc0000000>;
 	};
 
+	pcie-controller at 0,01003000 {
+		status = "okay";
+
+		pci at 1,0 {
+			status = "okay";
+		};
+
+		pci at 2,0 {
+			status = "okay";
+		};
+	};
+
+	padctl at 0,7009f000 {
+		pinctrl-0 = <&padctl_default>;
+		pinctrl-names = "default";
+
+		padctl_default: pinmux {
+			xusb {
+				nvidia,lanes = "otg-1", "otg-2";
+				nvidia,function = "xusb";
+				nvidia,iddq = <0>;
+			};
+
+			usb3 {
+				nvidia,lanes = "pcie-5", "pcie-6";
+				nvidia,function = "usb3";
+				nvidia,iddq = <0>;
+			};
+
+			pcie-x1 {
+				nvidia,lanes = "pcie-0";
+				nvidia,function = "pcie-x1";
+				nvidia,iddq = <0>;
+			};
+
+			pcie-x4 {
+				nvidia,lanes = "pcie-1", "pcie-2",
+					       "pcie-3", "pcie-4";
+				nvidia,function = "pcie-x4";
+				nvidia,iddq = <0>;
+			};
+
+			sata {
+				nvidia,lanes = "sata-0";
+				nvidia,function = "sata";
+				nvidia,iddq = <0>;
+			};
+		};
+	};
+
 	sdhci at 0,700b0000 {
 		status = "okay";
 		cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c
index cf2dd0b14f00..57f577d85d96 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <i2c.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
@@ -49,3 +50,32 @@ void pinmux_init(void)
 	pinmux_config_drvgrp_table(p2371_2180_drvgrps,
 				   ARRAY_SIZE(p2371_2180_drvgrps));
 }
+
+#ifdef CONFIG_PCI_TEGRA
+int tegra_pcie_board_init(void)
+{
+	struct udevice *dev;
+	uchar val;
+	int ret;
+
+	/* Turn on MAX77620 LDO1 to 1.05V for PEX power */
+	debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
+	ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
+		return -1;
+	}
+	/* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
+	val = 0xCA;
+	ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
+	if (ret)
+		printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);
+
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}
+#endif /* PCI */
diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h
index 3bdf1961a317..94f8085ceb62 100644
--- a/include/configs/p2371-2180.h
+++ b/include/configs/p2371-2180.h
@@ -53,6 +53,16 @@
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 
+/* PCI host support */
+#define CONFIG_PCI
+#define CONFIG_PCI_TEGRA
+#define CONFIG_PCI_PNP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PCI_ENUM
+
+/* PCI networking support */
+#define CONFIG_RTL8169
+
 /* General networking support */
 #define CONFIG_CMD_DHCP
 
-- 
1.9.1

[U-Boot] [PATCH 1/2] ARM: tegra: add PCI to Tegra210 SoC DT

[Stephen Warren]

On 10/05/2015 05:02 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Tegra210's PCI controller is largely identical to Tegra124, and hence
> shares the same binding. However, it has a unique compatible value due
> to the existence of at least one new HW bug that would prevent any driver
> for a previous HW version from operating correctly.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> For this series to operate correctly, it relies on my previous patches for:
> - fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
> - net: rtl8169: Build warning fixes for 64-bit
>    (Compile warning only)
> - Enabling CONFIG_SYS_NONCACHED_MEMORY
> - ARM: tegra210: implement PLLE init procedure from TRM
> - Tegra210 XUSB padctl support
> - Tegra210 PCI controller support

Tom,

Is this series OK? I assume it's only waiting for all the dependencies 
to go in first.

[U-Boot] [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180

[Tom Warren]

Stephen,

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Monday, October 05, 2015 4:03 PM
> To: u-boot at lists.denx.de; Simon Glass <sjg@chromium.org>; Tom Warren
> <TWarren@nvidia.com>; Stephen Warren <swarren@nvidia.com>
> Cc: Thierry Reding <treding@nvidia.com>
> Subject: [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180
> 
> From: Stephen Warren <swarren@nvidia.com>
> 
> p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This patch
> adds the relevant DT to enable the PCI controller and configure the XUSB padctl
> pin muxing, and code to turn on the PCI power and enable PCI features in U-
> Boot. I have only tested the x4 slot.
> 
> Signed-off-by: Stephen Warren <swarren@nvidia.com>

This breaks the P2371-2180 build with this error:

drivers/net/rtl8169.c: In function 'rtl_recv':
drivers/net/rtl8169.c:584:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  return rtl_recv_common((pci_dev_t)dev->priv, dev->iobase, NULL);
                         ^
drivers/net/rtl8169.c: In function 'rtl_send':
drivers/net/rtl8169.c:669:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  return rtl_send_common((pci_dev_t)dev->priv, dev->iobase, packet,
                         ^
drivers/net/rtl8169.c: In function 'rtl_reset':
drivers/net/rtl8169.c:849:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  rtl8169_common_start((pci_dev_t)dev->priv, dev->enetaddr);
                       ^

I've taken my current u-boot-tegra/master, rebased against u-boot/master, added your armv8 NONCACHED_MEMORY patchset, then your PLLE, XUSB and PCI patchsets. Here are the top commits:

cc0451c ARM: tegra: enable PCI support of p2371-2180
3674783 ARM: tegra: add PCI to Tegra210 SoC DT
a2a0f1d pci: tegra: add/enable support for Tegra210
f24777a pci: tegra: call tegra_pcie_board_init() earlier
f1b57b2 pci: tegra: implement PCA enable workaround
2a0107d pci: tegra: use #address-/size-cells from DT
6be7b04 pci: tegra: clip RAM size to 32-bits
d8776c4 ARM: tegra: error check Tegra210 XUSB padctl waits
fb8d8c3 ARM: tegra: add lane tables to Tegra210 XUSB padctl
976b363 ARM: tegra: switch Tegra210 to common XUSB padctl
4254023 ARM: tegra: parameterize common XUSB code
dfa1772 ARM: tegra: create common XUSB padctl driver file
9dcc2ce ARM: tegra: rename dummy XUSB padctl implementation
a9e6908 ARM: tegra210: implement PLLE init procedure from TRM
88fdb78 ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere
ae90990 ARM: tegra: add custom MMU setup on ARMv8
f19bce4 armv8: allow custom MMU setup routines on ARMv8
d303587 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
e8d124f Merge git://git.denx.de/u-boot-marvell
5b37212 mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows
1d51ea1 arm: mvebu: Enable DM_SERIAL on AXP / A38x boards

Tom
--
nvpublic

> ---
>  arch/arm/dts/tegra210-p2371-2180.dts | 50
> ++++++++++++++++++++++++++++++++++++
>  board/nvidia/p2371-2180/p2371-2180.c | 30 ++++++++++++++++++++++
>  include/configs/p2371-2180.h         | 10 ++++++++
>  3 files changed, 90 insertions(+)
> 
> diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-
> p2371-2180.dts
> index 5d9adcff31c3..bf35497d83f7 100644
> --- a/arch/arm/dts/tegra210-p2371-2180.dts
> +++ b/arch/arm/dts/tegra210-p2371-2180.dts
> @@ -21,6 +21,56 @@
>  		reg = <0x0 0x80000000 0x0 0xc0000000>;
>  	};
> 
> +	pcie-controller at 0,01003000 {
> +		status = "okay";
> +
> +		pci at 1,0 {
> +			status = "okay";
> +		};
> +
> +		pci at 2,0 {
> +			status = "okay";
> +		};
> +	};
> +
> +	padctl at 0,7009f000 {
> +		pinctrl-0 = <&padctl_default>;
> +		pinctrl-names = "default";
> +
> +		padctl_default: pinmux {
> +			xusb {
> +				nvidia,lanes = "otg-1", "otg-2";
> +				nvidia,function = "xusb";
> +				nvidia,iddq = <0>;
> +			};
> +
> +			usb3 {
> +				nvidia,lanes = "pcie-5", "pcie-6";
> +				nvidia,function = "usb3";
> +				nvidia,iddq = <0>;
> +			};
> +
> +			pcie-x1 {
> +				nvidia,lanes = "pcie-0";
> +				nvidia,function = "pcie-x1";
> +				nvidia,iddq = <0>;
> +			};
> +
> +			pcie-x4 {
> +				nvidia,lanes = "pcie-1", "pcie-2",
> +					       "pcie-3", "pcie-4";
> +				nvidia,function = "pcie-x4";
> +				nvidia,iddq = <0>;
> +			};
> +
> +			sata {
> +				nvidia,lanes = "sata-0";
> +				nvidia,function = "sata";
> +				nvidia,iddq = <0>;
> +			};
> +		};
> +	};
> +
>  	sdhci at 0,700b0000 {
>  		status = "okay";
>  		cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; diff
> --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-
> 2180/p2371-2180.c
> index cf2dd0b14f00..57f577d85d96 100644
> --- a/board/nvidia/p2371-2180/p2371-2180.c
> +++ b/board/nvidia/p2371-2180/p2371-2180.c
> @@ -6,6 +6,7 @@
>   */
> 
>  #include <common.h>
> +#include <netdev.h>
>  #include <i2c.h>
>  #include <asm/arch/gpio.h>
>  #include <asm/arch/pinmux.h>
> @@ -49,3 +50,32 @@ void pinmux_init(void)
>  	pinmux_config_drvgrp_table(p2371_2180_drvgrps,
>  				   ARRAY_SIZE(p2371_2180_drvgrps));  }
> +
> +#ifdef CONFIG_PCI_TEGRA
> +int tegra_pcie_board_init(void)
> +{
> +	struct udevice *dev;
> +	uchar val;
> +	int ret;
> +
> +	/* Turn on MAX77620 LDO1 to 1.05V for PEX power */
> +	debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
> +	ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1,
> &dev);
> +	if (ret) {
> +		printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
> +		return -1;
> +	}
> +	/* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
> +	val = 0xCA;
> +	ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
> +	if (ret)
> +		printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);
> +
> +	return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> +	return pci_eth_init(bis);
> +}
> +#endif /* PCI */
> diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index
> 3bdf1961a317..94f8085ceb62 100644
> --- a/include/configs/p2371-2180.h
> +++ b/include/configs/p2371-2180.h
> @@ -53,6 +53,16 @@
>  #define CONFIG_USB_HOST_ETHER
>  #define CONFIG_USB_ETHER_ASIX
> 
> +/* PCI host support */
> +#define CONFIG_PCI
> +#define CONFIG_PCI_TEGRA
> +#define CONFIG_PCI_PNP
> +#define CONFIG_CMD_PCI
> +#define CONFIG_CMD_PCI_ENUM
> +
> +/* PCI networking support */
> +#define CONFIG_RTL8169
> +
>  /* General networking support */
>  #define CONFIG_CMD_DHCP
> 
> --
> 1.9.1

[U-Boot] [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180

[Stephen Warren]

On 10/21/2015 05:03 PM, Tom Warren wrote:
> Stephen,
>
>> -----Original Message-----
>> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
>> Sent: Monday, October 05, 2015 4:03 PM
>> To: u-boot at lists.denx.de; Simon Glass <sjg@chromium.org>; Tom Warren
>> <TWarren@nvidia.com>; Stephen Warren <swarren@nvidia.com>
>> Cc: Thierry Reding <treding@nvidia.com>
>> Subject: [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180
>>
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This patch
>> adds the relevant DT to enable the PCI controller and configure the XUSB padctl
>> pin muxing, and code to turn on the PCI power and enable PCI features in U-
>> Boot. I have only tested the x4 slot.
>>
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>
> This breaks the P2371-2180 build with this error:
>
> drivers/net/rtl8169.c: In function 'rtl_recv':
> drivers/net/rtl8169.c:584:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
>    return rtl_recv_common((pci_dev_t)dev->priv, dev->iobase, NULL);
>                           ^
> drivers/net/rtl8169.c: In function 'rtl_send':
> drivers/net/rtl8169.c:669:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
>    return rtl_send_common((pci_dev_t)dev->priv, dev->iobase, packet,
>                           ^
> drivers/net/rtl8169.c: In function 'rtl_reset':
> drivers/net/rtl8169.c:849:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
>    rtl8169_common_start((pci_dev_t)dev->priv, dev->enetaddr);
>
> I've taken my current u-boot-tegra/master, rebased against u-boot/master, added your armv8 NONCACHED_MEMORY patchset, then your PLLE, XUSB and PCI patchsets. Here are the top commits:
...

You're missing the following two:

net: rtl8169: Build warning fixes for 64-bit
fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT

(see note below --- in patch 1)

I think everything else required is in your list.

[U-Boot] [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180

[Tom Warren]

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Wednesday, October 21, 2015 4:11 PM
> To: Tom Warren <TWarren@nvidia.com>
> Cc: u-boot at lists.denx.de; Simon Glass <sjg@chromium.org>; Stephen Warren
> <swarren@nvidia.com>; Thierry Reding <treding@nvidia.com>
> Subject: Re: [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180
> 
> On 10/21/2015 05:03 PM, Tom Warren wrote:
> > Stephen,
> >
> >> -----Original Message-----
> >> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> >> Sent: Monday, October 05, 2015 4:03 PM
> >> To: u-boot at lists.denx.de; Simon Glass <sjg@chromium.org>; Tom Warren
> >> <TWarren@nvidia.com>; Stephen Warren <swarren@nvidia.com>
> >> Cc: Thierry Reding <treding@nvidia.com>
> >> Subject: [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180
> >>
> >> From: Stephen Warren <swarren@nvidia.com>
> >>
> >> p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot.
> >> This patch adds the relevant DT to enable the PCI controller and
> >> configure the XUSB padctl pin muxing, and code to turn on the PCI
> >> power and enable PCI features in U- Boot. I have only tested the x4 slot.
> >>
> >> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> >
> > This breaks the P2371-2180 build with this error:
> >
> > drivers/net/rtl8169.c: In function 'rtl_recv':
> > drivers/net/rtl8169.c:584:25: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> >    return rtl_recv_common((pci_dev_t)dev->priv, dev->iobase, NULL);
> >                           ^
> > drivers/net/rtl8169.c: In function 'rtl_send':
> > drivers/net/rtl8169.c:669:25: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> >    return rtl_send_common((pci_dev_t)dev->priv, dev->iobase, packet,
> >                           ^
> > drivers/net/rtl8169.c: In function 'rtl_reset':
> > drivers/net/rtl8169.c:849:23: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> >    rtl8169_common_start((pci_dev_t)dev->priv, dev->enetaddr);
> >
> > I've taken my current u-boot-tegra/master, rebased against u-boot/master,
> added your armv8 NONCACHED_MEMORY patchset, then your PLLE, XUSB and
> PCI patchsets. Here are the top commits:
> ...
> 
> You're missing the following two:
> 
> net: rtl8169: Build warning fixes for 64-bit
> fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
Actually the 'net: rtl8169' patch is in there (brought in from my rebase w/u-boot/master this morning), but the 'fix fdtdec_get_pci_addr' patch isn't. Looks like it is assigned to Simon in Patchwork, and hasn't been applied yet (as of when I pulled down u-boot/master several hours ago). I'll check again, and apply it myself to get the build working if needed so I can do some testing.

Thanks
--
nvpublic
> 
> (see note below --- in patch 1)
> 
> I think everything else required is in your list.

[U-Boot] [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180

[Stephen Warren]

On 10/21/2015 05:24 PM, Tom Warren wrote:
>Stephen Warren wrote at Wednesday, October 21, 2015 4:11 PM:
>> On 10/21/2015 05:03 PM, Tom Warren wrote:
>>> Stephen,
>>>
>>>Stephen Warren wrote at Monday, October 05, 2015 4:03 PM:
>>>> p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot.
>>>> This patch adds the relevant DT to enable the PCI controller and
>>>> configure the XUSB padctl pin muxing, and code to turn on the PCI
>>>> power and enable PCI features in U- Boot. I have only tested the x4 slot.
>>>>
>>>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>>>
>>> This breaks the P2371-2180 build with this error:
>>>
>>> drivers/net/rtl8169.c: In function 'rtl_recv':
>>> drivers/net/rtl8169.c:584:25: warning: cast from pointer to integer of
>> different size [-Wpointer-to-int-cast]
>>>    return rtl_recv_common((pci_dev_t)dev->priv, dev->iobase, NULL);
>>>                           ^
>>> drivers/net/rtl8169.c: In function 'rtl_send':
>>> drivers/net/rtl8169.c:669:25: warning: cast from pointer to integer of
>> different size [-Wpointer-to-int-cast]
>>>    return rtl_send_common((pci_dev_t)dev->priv, dev->iobase, packet,
>>>                           ^
>>> drivers/net/rtl8169.c: In function 'rtl_reset':
>>> drivers/net/rtl8169.c:849:23: warning: cast from pointer to integer of
>> different size [-Wpointer-to-int-cast]
>>>    rtl8169_common_start((pci_dev_t)dev->priv, dev->enetaddr);
>>>
>>> I've taken my current u-boot-tegra/master, rebased against u-boot/master,
>> added your armv8 NONCACHED_MEMORY patchset, then your PLLE, XUSB and
>> PCI patchsets. Here are the top commits:
>> ...
>>
>> You're missing the following two:
>>
>> net: rtl8169: Build warning fixes for 64-bit
>> fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
>
> Actually the 'net: rtl8169' patch is in there (brought in from my rebase w/u-boot/master this morning), but the 'fix fdtdec_get_pci_addr' patch isn't. Looks like it is assigned to Simon in Patchwork, and hasn't been applied yet (as of when I pulled down u-boot/master several hours ago). I'll check again, and apply it myself to get the build working if needed so I can do some testing.

You're probably seeing this one from Thierry:
744152f8cf42 net: rtl8169: Build warning fixes for 64-bit

Some additional warnings were introduced by some other commit since he
wrote that. Unfortunately it looks like I the fix I wrote for that used
the same subject line; sorry about that. My patch is:

http://patchwork.ozlabs.org/patch/525854/
net: rtl8169: Build warning fixes for 64-bit