[U-Boot] [PATCH v0 4/5] arm: mvebu: Fix ddr3_init() cpu config

Stefan Roese
2015-10-28T16:35:56Z

Hi Dirk,

On 28.10.2015 16:44, dirk.eibach at gdsys.cc wrote:
> From: Dirk Eibach <dirk.eibach@gdsys.cc>
>
> Armada 38x has a maximum of two cores. Probably copy/paste
> bug from Armada XP.
>
> Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
> ---
>
> drivers/ddr/marvell/a38x/ddr3_init.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
> index d6ed8e0..cbfc58c 100644
> --- a/drivers/ddr/marvell/a38x/ddr3_init.c
> +++ b/drivers/ddr/marvell/a38x/ddr3_init.c
> @@ -306,8 +306,6 @@ int ddr3_init(void)
> SAR1_CPU_CORE_OFFSET;
> switch (soc_num) {
> case 0x3:
> - reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
> - reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
> case 0x1:
> reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
> case 0x0:

Shouldn't you remove the "case 0x3:" line as well?

Thanks,
Stefan