From: Michal Simek <michal.simek@xilinx.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 5/8] net: zynq: Wait till packet is sent
Date: Wed, 4 Nov 2015 14:46:13 +0100 [thread overview]
Message-ID: <563A0C25.8050306@xilinx.com> (raw)
In-Reply-To: <CANr=Z=bnFPgweX+vyAog0XO4_Z-a=6_WCfrEx1VZ3WDc=6bw6A@mail.gmail.com>
On 11/02/2015 10:40 PM, Joe Hershberger wrote:
> On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek <michal.simek@xilinx.com> wrote:
>> Wait till BD is process to ensure that packet was sent successfully.
>
> process -> processed
Fixed in v2.
>
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> drivers/net/zynq_gem.c | 33 ++++++++++++++++++++++++++++++++-
>> 1 file changed, 32 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
>> index e49aa86127d1..c56e02132ae9 100644
>> --- a/drivers/net/zynq_gem.c
>> +++ b/drivers/net/zynq_gem.c
>> @@ -23,6 +23,7 @@
>> #include <asm/system.h>
>> #include <asm/arch/hardware.h>
>> #include <asm/arch/sys_proto.h>
>> +#include <asm-generic/errno.h>
>>
>> #if !defined(CONFIG_PHYLIB)
>> # error XILINX_GEM_ETHERNET requires PHYLIB
>> @@ -86,6 +87,8 @@
>> ZYNQ_GEM_DMACR_TXSIZE | \
>> ZYNQ_GEM_DMACR_RXBUF)
>>
>> +#define ZYNQ_GEM_TSR_DONE 0x00000020 /* Tx done mask */
>> +
>> /* Use MII register 1 (MII status register) to detect PHY */
>> #define PHY_DETECT_REG 1
>>
>> @@ -427,6 +430,33 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
>> return 0;
>> }
>>
>> +static inline int wait_for_bit(const char *func, u32 *reg, const u32 mask,
>> + bool set, unsigned int timeout)
>
> There is no need to specify "inline" here.
Fixed in v2.
Thanks,
Michal
next prev parent reply other threads:[~2015-11-04 13:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-27 15:17 [U-Boot] [PATCH 1/8] net: zynq: Allocate BD_SPACE in connection to RX_BUF Michal Simek
2015-10-27 15:17 ` [U-Boot] [PATCH 2/8] net: zynq: Setup BD when structures are filled Michal Simek
2015-11-02 21:39 ` Joe Hershberger
2015-10-27 15:17 ` [U-Boot] [PATCH 3/8] net: zynq: Do not report TX underrun Michal Simek
2015-11-02 21:40 ` Joe Hershberger
2015-10-27 15:17 ` [U-Boot] [PATCH 4/8] net: zynq: Add dummy packet to fix packet duplication issue Michal Simek
2015-11-02 21:40 ` Joe Hershberger
2015-10-27 15:17 ` [U-Boot] [PATCH 5/8] net: zynq: Wait till packet is sent Michal Simek
2015-11-02 21:40 ` Joe Hershberger
2015-11-04 13:46 ` Michal Simek [this message]
2015-10-27 15:17 ` [U-Boot] [PATCH 6/8] net: zynq: Fix mdc clock division setting for 100Mbit/s Michal Simek
2015-11-02 21:40 ` Joe Hershberger
2015-10-27 15:17 ` [U-Boot] [PATCH 7/8] net: zynq: Remove unused MDCCLKDIV2 macro Michal Simek
2015-11-02 21:40 ` Joe Hershberger
2015-10-27 15:17 ` [U-Boot] [PATCH 8/8] net: zynq: Fix MDC setting for zynq Michal Simek
2015-11-02 21:39 ` Joe Hershberger
2015-11-04 13:40 ` Michal Simek
2015-11-04 18:19 ` Joe Hershberger
2015-11-02 21:39 ` [U-Boot] [PATCH 1/8] net: zynq: Allocate BD_SPACE in connection to RX_BUF Joe Hershberger
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