U-Boot Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH][v2] armv8: ls2085a: Add workaround of errata A009635
Date: Wed, 4 Nov 2015 10:57:24 -0800	[thread overview]
Message-ID: <563A5514.6080700@freescale.com> (raw)
In-Reply-To: <1446621873-26180-1-git-send-email-prabhakar@freescale.com>



On 11/03/2015 11:24 PM, Prabhakar Kushwaha wrote:
> If the core runs at higher than x3 speed of the platform, there is
> possiblity about sev instruction to getting missed by other cores. 
> This is because of SoC Run Control block may not able to sample
> the EVENTI(Sev) signals.
> 
> Configure Run Control and EPU to periodically send out EVENTI signals to
> wake up A57 cores.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> ---
> Chages for v2: Updated description
> 
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c           |  6 ++++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 39 +++++++++++++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  9 ++++++
>  arch/arm/include/asm/arch-fsl-layerscape/soc.h    |  3 ++
>  4 files changed, 57 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index 0cb0afa..dbb12c2 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -484,7 +484,13 @@ int arch_early_init_r(void)
>  {
>  #ifdef CONFIG_MP
>  	int rv = 1;
> +#endif
> +
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
> +	erratum_a009635();
> +#endif
>  
> +#ifdef CONFIG_MP
>  	rv = fsl_layerscape_wake_seconday_cores();
>  	if (rv)
>  		printf("Did not wake secondary cores\n");
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 637853d..e8cdb10 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -9,10 +9,49 @@
>  #include <asm/arch/soc.h>
>  #include <asm/io.h>
>  #include <asm/global_data.h>
> +#include <asm/arch-fsl-layerscape/config.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  #ifdef CONFIG_LS2085A
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
> +#define PLATFORM_CYCLE_ENV_VAR	"a009635_interval_val"
> +
> +static unsigned long get_internval_val_mhz(void)
> +{
> +	char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);

Why do you need a variable to override the calculation?


> +	ulong interval_mhz = get_bus_freq(0) / (1000 * 1000);

Please add a comment here to explain what the interval does and why it is
calculated this way.

York

  reply	other threads:[~2015-11-04 18:57 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-04  7:24 [U-Boot] [PATCH][v2] armv8: ls2085a: Add workaround of errata A009635 Prabhakar Kushwaha
2015-11-04 18:57 ` York Sun [this message]
2015-11-05  3:58   ` Kushwaha Prabhakar
2015-11-05  4:07     ` York Sun
2015-11-05  4:18       ` Kushwaha Prabhakar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=563A5514.6080700@freescale.com \
    --to=yorksun@freescale.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox