From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 5 Nov 2015 10:05:05 -0800 Subject: [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514 In-Reply-To: <1446719200-31044-4-git-send-email-yao.yuan@freescale.com> References: <1446719200-31044-1-git-send-email-yao.yuan@freescale.com> <1446719200-31044-4-git-send-email-yao.yuan@freescale.com> Message-ID: <563B9A51.7080603@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/05/2015 02:26 AM, Yuan Yao wrote: > This is a workaround for hardware erratum. > Write the value of 63b2_0002h to EDDRTQCFG will optimal the > memory controller performance. > > The value: 63b2_0002h comes from the hardware team. > > Signed-off-by: Yuan Yao > --- > Changes in v2: > Rewrite the commit message to explain why and what this patch does. > --- > arch/arm/cpu/armv7/ls102xa/soc.c | 10 ++++++++++ > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > 2 files changed, 11 insertions(+), 1 deletion(-) Workaround for A008514 is already implemented in DDR driver drivers/ddr/fsl/fsl_ddr_gen4.c. Please see if you can merge your workaround into it. York