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From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514
Date: Mon, 9 Nov 2015 09:01:03 -0800	[thread overview]
Message-ID: <5640D14F.5080306@freescale.com> (raw)
In-Reply-To: <BLUPR03MB134DEA73259C6FC8D1A403083150@BLUPR03MB134.namprd03.prod.outlook.com>



On 11/09/2015 01:30 AM, Yuan Yao-B46683 wrote:
> Hi york,
> 
> Is it for DDR4?
> LS1021A doesn't use this file.

LS1021A support both DDR3 and DDR4. DDR4 mode uses this driver, doesn't it?
My concern is if the workaround is implemented in different places, it will be
harder to maintain in future versions fix this erratum. Maybe moving the
workaround out of DDR driver to SoC is not a bad idea.

York


> 
> Best Regards,
> Yuan Yao
> 
>> -----Original Message-----
>> From: York Sun [mailto:yorksun at freescale.com]
>> Sent: Friday, November 06, 2015 2:05 AM
>> To: Yuan Yao-B46683 <yao.yuan@freescale.com>
>> Cc: Wang Huan-B18965 <alison.wang@freescale.com>; u-boot at lists.denx.de
>> Subject: Re: [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum
>> A008514
>>
>>
>>
>> On 11/05/2015 02:26 AM, Yuan Yao wrote:
>>> This is a workaround for hardware erratum.
>>> Write the value of 63b2_0002h to EDDRTQCFG will optimal the memory
>>> controller performance.
>>>
>>> The value: 63b2_0002h comes from the hardware team.
>>>
>>> Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
>>> ---
>>> Changes in v2:
>>> Rewrite the commit message to explain why and what this patch does.
>>> ---
>>>  arch/arm/cpu/armv7/ls102xa/soc.c                  | 10 ++++++++++
>>>  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  2 +-
>>>  2 files changed, 11 insertions(+), 1 deletion(-)
>>
>> Workaround for A008514 is already implemented in DDR driver
>> drivers/ddr/fsl/fsl_ddr_gen4.c. Please see if you can merge your workaround
>> into it.
>>
>> York
> 

  reply	other threads:[~2015-11-09 17:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05 10:26 [U-Boot] [PATCH v2 1/5] arm: ls1021a: merge SoC specific code in a separate file Yuan Yao
2015-11-05 10:26 ` [U-Boot] [PATCH 2/5] arm: ls102xa: enable all the snoop signal for masters Yuan Yao
2015-11-05 10:26 ` [U-Boot] [PATCH 3/5] ls102xa: Enable snoop and DVM message requests Yuan Yao
2015-11-05 10:26 ` [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514 Yuan Yao
2015-11-05 18:05   ` York Sun
2015-11-09  9:30     ` Yao Yuan
2015-11-09 17:01       ` York Sun [this message]
2015-11-10 13:18         ` Yao Yuan
2015-11-10 16:43           ` York Sun
2015-11-15 13:19             ` Yao Yuan
2015-11-05 10:26 ` [U-Boot] [PATCH v2 5/5] LS102XA:workaround:disable priorities within DDR Yuan Yao
  -- strict thread matches above, loose matches on Subject: below --
2015-11-26  7:57 [U-Boot] [PATCH 1/5] arm: ls1021a: merge SoC specific code in a separate file Yuan Yao
2015-11-26  7:58 ` [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514 Yuan Yao
2015-12-04  9:37 [U-Boot] [PATCH 0/5] arm: ls1021a: merge SoC specific code in a separate file Yuan Yao
2015-12-04  9:37 ` [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514 Yuan Yao
2015-12-05  6:59 [U-Boot] [PATCH v3 0/5] arm: ls1021a: merge SoC specific code in a separate file Yuan Yao
2015-12-05  6:59 ` [U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514 Yuan Yao
2015-12-15  1:00   ` York Sun

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