From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michal Simek Date: Thu, 19 Nov 2015 15:09:59 +0100 Subject: [U-Boot] [GIT PULL] Zynq changes Message-ID: <564DD837.4090404@monstr.eu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Tom, please pull these changes to your tree. Network patches have been Ack by Joe. mkimage, mii patches were reviewed by you. There is one problem with U-Boot SPL for Zynq because one patch break it (not compilation) "board_init: Change the logic to setup malloc_base" (sha1: 9ac4fc82071ce346e3885118242ff45d22f69b82) There is also one compilation warning from gem driver. I will send the patch to fix it. Thanks, Michal The following changes since commit 736d1746fb7b8f7cd70657a4a72db2b6bd8de40e: itest: add missing break statements to evalexp() (2015-11-18 15:29:00 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git zynq for you to fetch changes up to bdaeb8f23c6d5d11829072baaf0c0fe37c09f26a: common: mii: Do not allow to exceed max phy limit (2015-11-19 14:03:05 +0100) ---------------------------------------------------------------- Edgar E. Iglesias (2): net: phy: Add support for Texas Instruments DP83867 net: zynq: Disable secondary queues Michal Simek (17): zynqmp: mp: Add support for booting R5 from any address ARM: zynq: Choose boot image based on OF_SEPARATE macro ARM64: zynqmp: Enable TI phy by default net: zynq: Add debug message to phyread/phywrite net: zynq: Add support for different PHY interface types net: zynq: Extend register description with offsets net: zynq: Fix clearing statistic net: zynq: Allocate BD_SPACE in connection to RX_BUF net: zynq: Setup BD when structures are filled net: zynq: Do not report TX underrun net: zynq: Add dummy packet to fix packet duplication issue net: zynq: Wait till packet is sent net: zynq: Fix mdc clock division setting for 100Mbit/s net: zynq: Remove unused MDCCLKDIV2 macro net: zynq: Fix MDC setting for zynq zynq: sdhci: Define max clock by macro common: mii: Do not allow to exceed max phy limit Nathan Rossi (2): tools: zynqimage: Add Xilinx Zynq boot header generation to mkimage ARM: zynq: Add target for building bootable SPL image for Zynq Makefile | 3 +++ arch/arm/cpu/armv8/zynqmp/mp.c | 38 ++++++++++++++++++++++++++--- common/cmd_mii.c | 5 ++++ common/image.c | 1 + drivers/mmc/zynq_sdhci.c | 2 +- drivers/net/phy/Makefile | 1 + drivers/net/phy/phy.c | 3 +++ drivers/net/phy/ti.c | 200 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/zynq_gem.c | 143 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------- include/configs/xilinx_zynqmp.h | 4 +++ include/configs/xilinx_zynqmp_ep.h | 1 + include/configs/zynq-common.h | 3 ++- include/image.h | 3 ++- include/phy.h | 1 + scripts/Makefile.spl | 11 +++++++++ tools/Makefile | 1 + tools/zynqimage.c | 257 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 17 files changed, 638 insertions(+), 39 deletions(-) create mode 100644 drivers/net/phy/ti.c create mode 100644 tools/zynqimage.c -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: OpenPGP digital signature URL: