From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hans de Goede Date: Sun, 22 Nov 2015 16:40:29 +0100 Subject: [U-Boot] [PATCH] sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs In-Reply-To: References: <1448044323-4447-1-git-send-email-hdegoede@redhat.com> <1448120909.13926.3.camel@hellion.org.uk> Message-ID: <5651E1ED.5040503@redhat.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 22-11-15 15:14, Chen-Yu Tsai wrote: > On Sat, Nov 21, 2015 at 11:48 PM, Ian Campbell wrote: >> On Fri, 2015-11-20 at 19:32 +0100, Hans de Goede wrote: >>> According to the datasheets the max speed of AHB1 is 276 MHz, so >>> setting it to PLL6 / 3 which gives us 200MHz everywhere is fine, >>> and gives us a nice speed-up in certain workloads. >>> >>> Suggested-by: Chen-Yu Tsai >>> Signed-off-by: Hans de Goede >> >> I suppose you've tested this on at least one such board? In that case: >> Acked-by: Ian Campbell > > I've tested this on some of my boards. It works fine on my Hummingbird A31 > and A23 Q8 tablet. However my Sinlinx SinA33 is giving me kernel Oops which > I haven't looked into yet. Works for me on a q8 A33 tablet. But lets investigate your oops before including this in the next pull-req. Thanks for the testing! Regards, Hans