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From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to reflect LS2080A
Date: Wed, 25 Nov 2015 10:51:00 -0800	[thread overview]
Message-ID: <56560314.1060701@freescale.com> (raw)
In-Reply-To: <DM2PR0301MB0670AFFF735C0E3C50C2D1CBA9060@DM2PR0301MB0670.namprd03.prod.outlook.com>



On 11/23/2015 10:42 PM, Kushwaha Prabhakar-B32579 wrote:
> 
>> -----Original Message-----
>> From: York Sun [mailto:yorksun at freescale.com]
>> Sent: Tuesday, November 24, 2015 11:14 AM
>> To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com>; u-
>> boot at lists.denx.de
>> Cc: Srivastava Pratiyush-B46174 <pratiyush.srivastava@freescale.com>
>> Subject: Re: [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to reflect
>> LS2080A
>>
>>
>>
>> On 11/23/2015 08:25 PM, Kushwaha Prabhakar-B32579 wrote:
>>>
>>>> -----Original Message-----
>>>> From: York Sun [mailto:yorksun at freescale.com]
>>>> Sent: Tuesday, November 24, 2015 12:49 AM
>>>> To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com>; u-
>>>> boot at lists.denx.de
>>>> Cc: Srivastava Pratiyush-B46174 <pratiyush.srivastava@freescale.com>
>>>> Subject: Re: [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to
>>>> reflect LS2080A
>>>>
>>>>
>>>>
>>>> On 11/09/2015 03:12 AM, Prabhakar Kushwaha wrote:
>>>>> LS2080A is a prime personality of Freescale?s LS2085A. It is a
>>>>> non-AIOP personality without support of DP-DDR, L2 switch, 1588,
>>>>> PCIe
>>>> endpoint etc.
>>>>> So renaming existing LS2085A code base to reflect LS2080A (Prime
>>>>> personality)
>>>>>
>>>>> Signed-off-by: Pratiyush Mohan Srivastava
>>>>> <pratiyush.srivastava@freescale.com>
>>>>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>>>>> ---
>>>>> Changes for v2: Rebased on LS1043 patch set
>>>>
>>>> <snip>
>>>>
>>>>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
>>>>> b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
>>>>> index 2903996..5a91dcb 100644
>>>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
>>>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
>>>>> @@ -8,8 +8,10 @@
>>>>>  #define _FSL_LAYERSCAPE_CPU_H
>>>>>
>>>>>  static struct cpu_type cpu_type_list[] = {
>>>>> -	CPU_TYPE_ENTRY(LS2085, LS2085, 8),
>>>>> +#ifdef CONFIG_LS2080A
>>>>>  	CPU_TYPE_ENTRY(LS2080, LS2080, 8),
>>>>> +#endif
>>>>> +	CPU_TYPE_ENTRY(LS2085, LS2085, 8),
>>>>>  	CPU_TYPE_ENTRY(LS2045, LS2045, 4),
>>>>>  	CPU_TYPE_ENTRY(LS1043, LS1043, 4),  };
>>>>
>>>> Why using ifdef here?
>>>
>>> I am trying to reduce size of table.
>>> Instead of adding all SoC in table only defined the required one at a time.
>>
>> I thought the plan was to support both LS2080 and LS2085 in one image built
>> for LS2080. We have always used a complete table for cpu list. If you are
>> flexible, I will drop the ifdef when merging this patch.
>>
> 
> Yes, we can drop the ifdef.
> 

Will do.

FYI, when I build the new image for ls2085aqds and run it on QDS, the SoC is
"unknown (0x87011010)" with the ifdef in place. That's why I believe the ifdef
shouldn't be there.

York

  reply	other threads:[~2015-11-25 18:51 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-09 11:12 [U-Boot] [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to reflect LS2080A Prabhakar Kushwaha
2015-11-10 19:10 ` York Sun
2015-11-16  4:35   ` Kushwaha Prabhakar
2015-11-16  4:54     ` York Sun
2015-11-23 19:19 ` York Sun
2015-11-24  4:25   ` Kushwaha Prabhakar
2015-11-24  5:44     ` York Sun
2015-11-24  6:42       ` Kushwaha Prabhakar
2015-11-25 18:51         ` York Sun [this message]
2015-11-30 17:10 ` York Sun

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