From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Wed, 25 Nov 2015 10:51:00 -0800 Subject: [U-Boot] [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to reflect LS2080A In-Reply-To: References: <1447067527-24150-1-git-send-email-prabhakar@freescale.com> <565366BF.6010501@freescale.com> <5653F92D.6080503@freescale.com> Message-ID: <56560314.1060701@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/23/2015 10:42 PM, Kushwaha Prabhakar-B32579 wrote: > >> -----Original Message----- >> From: York Sun [mailto:yorksun at freescale.com] >> Sent: Tuesday, November 24, 2015 11:14 AM >> To: Kushwaha Prabhakar-B32579 ; u- >> boot at lists.denx.de >> Cc: Srivastava Pratiyush-B46174 >> Subject: Re: [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to reflect >> LS2080A >> >> >> >> On 11/23/2015 08:25 PM, Kushwaha Prabhakar-B32579 wrote: >>> >>>> -----Original Message----- >>>> From: York Sun [mailto:yorksun at freescale.com] >>>> Sent: Tuesday, November 24, 2015 12:49 AM >>>> To: Kushwaha Prabhakar-B32579 ; u- >>>> boot at lists.denx.de >>>> Cc: Srivastava Pratiyush-B46174 >>>> Subject: Re: [PATCH 1/2][v2] armv8: LS2080A: Rename LS2085A to >>>> reflect LS2080A >>>> >>>> >>>> >>>> On 11/09/2015 03:12 AM, Prabhakar Kushwaha wrote: >>>>> LS2080A is a prime personality of Freescale?s LS2085A. It is a >>>>> non-AIOP personality without support of DP-DDR, L2 switch, 1588, >>>>> PCIe >>>> endpoint etc. >>>>> So renaming existing LS2085A code base to reflect LS2080A (Prime >>>>> personality) >>>>> >>>>> Signed-off-by: Pratiyush Mohan Srivastava >>>>> >>>>> Signed-off-by: Prabhakar Kushwaha >>>>> --- >>>>> Changes for v2: Rebased on LS1043 patch set >>>> >>>> >>>> >>>>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h >>>>> b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h >>>>> index 2903996..5a91dcb 100644 >>>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h >>>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h >>>>> @@ -8,8 +8,10 @@ >>>>> #define _FSL_LAYERSCAPE_CPU_H >>>>> >>>>> static struct cpu_type cpu_type_list[] = { >>>>> - CPU_TYPE_ENTRY(LS2085, LS2085, 8), >>>>> +#ifdef CONFIG_LS2080A >>>>> CPU_TYPE_ENTRY(LS2080, LS2080, 8), >>>>> +#endif >>>>> + CPU_TYPE_ENTRY(LS2085, LS2085, 8), >>>>> CPU_TYPE_ENTRY(LS2045, LS2045, 4), >>>>> CPU_TYPE_ENTRY(LS1043, LS1043, 4), }; >>>> >>>> Why using ifdef here? >>> >>> I am trying to reduce size of table. >>> Instead of adding all SoC in table only defined the required one at a time. >> >> I thought the plan was to support both LS2080 and LS2085 in one image built >> for LS2080. We have always used a complete table for cpu list. If you are >> flexible, I will drop the ifdef when merging this patch. >> > > Yes, we can drop the ifdef. > Will do. FYI, when I build the new image for ls2085aqds and run it on QDS, the SoC is "unknown (0x87011010)" with the ifdef in place. That's why I believe the ifdef shouldn't be there. York