From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Thu, 26 Nov 2015 18:47:42 +0100 Subject: [U-Boot] [PATCH v7 00/34] sf: MTD support In-Reply-To: References: <1448539458-14306-1-git-send-email-jteki@openedev.com> <5656FBC5.6@denx.de> <56570362.7070808@denx.de> Message-ID: <565745BE.7020309@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Simon, On 26.11.2015 17:48, Simon Glass wrote: >> Yes. I'm trying to enable SPL_DM on MVEBU. And this with >> DM_SPI and DM_SPI_FLASH enabled as well. I've the kirkwood >> SPI driver ported to DM here for this (patches will follow). >> >>> what kind of issue? >>> is it failed to probe device or something? >> >> Here the log (with some debug() enabled): >> >> ----------<------------------------------- >> uclass_find_device_by_seq: 0 -1 >> uclass_find_device_by_seq: 0 0 >> - -1 -1 >> - not found >> bind node serial at 12000 >> - found match at 'ns16550_serial' >> Bound device serial at 12000 to root_driver >> uclass_find_device_by_seq: 0 -1 >> uclass_find_device_by_seq: 0 0 >> - -1 -1 >> - not found >> >> U-Boot SPL 2016.01-rc1-00267-gdb3362c-dirty (Nov 26 2015 - 14:00:16) >> High speed PHY - Version: 2.0 >> Detected Device ID 6828 >> board SerDes lanes topology details: >> | Lane # | Speed | Type | >> -------------------------------- >> | 0 | 5 | PCIe0 | >> | 1 | 3 | SATA0 | >> | 2 | 3 | SATA1 | >> | 3 | 3 | SATA3 | >> | 4 | 3 | SATA2 | >> | 5 | 5 | USB3 HOST1 | >> -------------------------------- >> PCIe, Idx 0: detected no link >> High speed PHY - Ended Successfully >> DDR3 Training Sequence - Ver TIP-1.29.0 >> DDR3 Training Sequence - Switching XBAR Window to FastPath Window >> DDR3 Training Sequence - Ended Successfully >> Trying to boot from SPI >> uclass_find_device_by_seq: 0 0 >> - not found >> uclass_find_device_by_seq: 1 0 >> - not found >> Invalid bus 0 (err=-19) >> SPI probe failed. >> SPL: failed to boot from all boot devices >> ### ERROR ### Please RESET the board ### >> ----------<------------------------------- >> >> Simon, do you have a clue what's missing here? SPI NOR booting >> is working just fine in SPL without SPL_DM enabled on this >> platform. AFAICT, I've added the required "u-boot,dm-pre-reloc" >> properties to the dts. >> >>> I will verify the same and >>> let you know. >> >> How can you verify this if SPI is not working at all for you? Or >> did I misunderstand you (see above)? > > -19 means -ENODEV. I suppose CONFIG_SPL_OF_CONTROL is enabled. Yes. > You can > check the device tree used for SPL in your build directory - > spl/u-boot-spl.dtb. > > From the debugging it looks like you have no SPI flash devices. That is my understanding as well. And I fail to see, where this device get added to the list of UCLASS devices. > You can check chromebook_jerry which uses this feature. See this node: > > &spi2 { > status = "okay"; > u-boot,dm-pre-reloc; > > spi_flash: spiflash at 0 { > u-boot,dm-pre-reloc; > compatible = "spidev", "spi-flash"; > spi-max-frequency = <20000000>; /* Reduce for Dediprog em100 pro */ > reg = <0>; > }; > }; I've checked this now and reworked the dts a bit. But still no cigar. The debug output is identical to the last one. I've attached the dts / dtb and the current .config. It would be great if you could take a quick look at it to see, what I am missing here. Thanks, Stefan -------------- next part -------------- # # Automatically generated file; DO NOT EDIT. # U-Boot 2016.01-rc1 Configuration # CONFIG_CREATE_ARCH_SYMLINK=y CONFIG_HAVE_GENERIC_BOARD=y CONFIG_SYS_GENERIC_BOARD=y # CONFIG_ARC is not set CONFIG_ARM=y # CONFIG_AVR32 is not set # CONFIG_BLACKFIN is not set # CONFIG_M68K is not set # CONFIG_MICROBLAZE is not set # CONFIG_MIPS is not set # CONFIG_NDS32 is not set # CONFIG_NIOS2 is not set # CONFIG_OPENRISC is not set # CONFIG_PPC is not set # CONFIG_SANDBOX is not set # CONFIG_SH is not set # CONFIG_SPARC is not set # CONFIG_X86 is not set CONFIG_SYS_ARCH="arm" CONFIG_SYS_CPU="armv7" CONFIG_SYS_SOC="mvebu" CONFIG_SYS_VENDOR="Marvell" CONFIG_SYS_BOARD="db-88f6820-gp" CONFIG_SYS_CONFIG_NAME="db-88f6820-gp" # # ARM architecture # CONFIG_HAS_VBAR=y CONFIG_HAS_THUMB2=y CONFIG_CPU_V7=y # CONFIG_SEMIHOSTING is not set # CONFIG_SYS_L2CACHE_OFF is not set # CONFIG_ARCH_AT91 is not set # CONFIG_TARGET_EDB93XX is not set # CONFIG_TARGET_VCMA9 is not set # CONFIG_TARGET_SMDK2410 is not set # CONFIG_TARGET_ASPENITE is not set # CONFIG_TARGET_GPLUGD is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_KIRKWOOD is not set CONFIG_ARCH_MVEBU=y # CONFIG_TARGET_DEVKIT3250 is not set # CONFIG_TARGET_WORK_92105 is not set # CONFIG_TARGET_MX25PDK is not set # CONFIG_TARGET_ZMX25 is not set # CONFIG_TARGET_APF27 is not set # CONFIG_TARGET_APX4DEVKIT is not set # CONFIG_TARGET_XFI3 is not set # CONFIG_TARGET_M28EVK is not set # CONFIG_TARGET_MX23EVK is not set # CONFIG_TARGET_MX28EVK is not set # CONFIG_TARGET_MX23_OLINUXINO is not set # CONFIG_TARGET_BG0900 is not set # CONFIG_TARGET_SANSA_FUZE_PLUS is not set # CONFIG_TARGET_SC_SPS_1 is not set # CONFIG_ORION5X is not set # CONFIG_TARGET_SPEAR300 is not set # CONFIG_TARGET_SPEAR310 is not set # CONFIG_TARGET_SPEAR320 is not set # CONFIG_TARGET_SPEAR600 is not set # CONFIG_TARGET_STV0991 is not set # CONFIG_TARGET_X600 is not set # CONFIG_TARGET_IMX31_PHYCORE is not set # CONFIG_TARGET_MX31ADS is not set # CONFIG_TARGET_MX31PDK is not set # CONFIG_TARGET_WOODBURN is not set # CONFIG_TARGET_WOODBURN_SD is not set # CONFIG_TARGET_FLEA3 is not set # CONFIG_TARGET_MX35PDK is not set # CONFIG_ARCH_BCM283X is not set # CONFIG_TARGET_VEXPRESS_CA15_TC2 is not set # CONFIG_TARGET_VEXPRESS_CA5X2 is not set # CONFIG_TARGET_VEXPRESS_CA9X4 is not set # CONFIG_TARGET_KWB is not set # CONFIG_TARGET_TSERIES is not set # CONFIG_TARGET_CM_T335 is not set # CONFIG_TARGET_PEPPER is not set # CONFIG_TARGET_AM335X_IGEP0033 is not set # CONFIG_TARGET_PCM051 is not set # CONFIG_TARGET_DRACO is not set # CONFIG_TARGET_THUBAN is not set # CONFIG_TARGET_RASTABAN is not set # CONFIG_TARGET_PXM2 is not set # CONFIG_TARGET_RUT is not set # CONFIG_TARGET_PENGWYN is not set # CONFIG_TARGET_AM335X_BALTOS is not set # CONFIG_TARGET_AM335X_EVM is not set # CONFIG_TARGET_AM335X_SL50 is not set # CONFIG_TARGET_AM43XX_EVM is not set # CONFIG_TARGET_BAV335X is not set # CONFIG_TARGET_TI814X_EVM is not set # CONFIG_TARGET_TI816X_EVM is not set # CONFIG_TARGET_BCM28155_AP is not set # CONFIG_TARGET_BCMCYGNUS is not set # CONFIG_TARGET_BCMNSP is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_HIGHBANK is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_KEYSTONE is not set # CONFIG_ARCH_MX7 is not set # CONFIG_ARCH_MX6 is not set # CONFIG_ARCH_MX5 is not set # CONFIG_TARGET_M53EVK is not set # CONFIG_TARGET_MX51EVK is not set # CONFIG_TARGET_MX53ARD is not set # CONFIG_TARGET_MX53EVK is not set # CONFIG_TARGET_MX53LOCO is not set # CONFIG_TARGET_MX53SMD is not set # CONFIG_OMAP34XX is not set # CONFIG_OMAP44XX is not set # CONFIG_OMAP54XX is not set # CONFIG_RMOBILE is not set # CONFIG_ARCH_SOCFPGA is not set # CONFIG_TARGET_CM_T43 is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_TARGET_TS4800 is not set # CONFIG_TARGET_VF610TWR is not set # CONFIG_TARGET_COLIBRI_VF is not set # CONFIG_TARGET_PCM052 is not set # CONFIG_ARCH_ZYNQ is not set # CONFIG_ARCH_ZYNQMP is not set # CONFIG_TEGRA is not set # CONFIG_TARGET_VEXPRESS64_AEMV8A is not set # CONFIG_TARGET_VEXPRESS64_BASE_FVP is not set # CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM is not set # CONFIG_TARGET_VEXPRESS64_JUNO is not set # CONFIG_TARGET_LS2085A_EMU is not set # CONFIG_TARGET_LS2085A_SIMU is not set # CONFIG_TARGET_LS2085AQDS is not set # CONFIG_TARGET_LS2085ARDB is not set # CONFIG_TARGET_HIKEY is not set # CONFIG_TARGET_LS1021AQDS is not set # CONFIG_TARGET_LS1021ATWR is not set # CONFIG_TARGET_LS1043ARDB is not set # CONFIG_TARGET_H2200 is not set # CONFIG_TARGET_COLIBRI_PXA270 is not set # CONFIG_ARCH_UNIPHIER is not set # CONFIG_TARGET_STM32F429_DISCOVERY is not set # CONFIG_ARCH_ROCKCHIP is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 # CONFIG_TARGET_CLEARFOG is not set CONFIG_TARGET_DB_88F6820_GP=y # CONFIG_TARGET_DB_MV784MP_GP is not set # CONFIG_TARGET_MAXBCM is not set # CONFIG_MVEBU_BOOTROM_UARTBOOT is not set CONFIG_SYS_MALLOC_F=y CONFIG_SPL_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y # CONFIG_DM_I2C is not set # CONFIG_DM_GPIO is not set # # ARM debug # # CONFIG_DEBUG_LL is not set # CONFIG_DM_KEYBOARD is not set CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" # # General setup # CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EXPERT=y CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y # # Boot images # CONFIG_SUPPORT_SPL=y CONFIG_SPL=y # CONFIG_SPL_SYS_MALLOC_SIMPLE is not set # CONFIG_SPL_STACK_R is not set # CONFIG_SPL_SEPARATE_BSS is not set # CONFIG_FIT is not set CONFIG_SYS_EXTRA_OPTIONS="" # # Command line interface # # CONFIG_HUSH_PARSER is not set CONFIG_SYS_PROMPT="=> " # # Autoboot options # # CONFIG_AUTOBOOT_KEYED is not set # # Commands # # # Info commands # CONFIG_CMD_BDI=y CONFIG_CMD_CONSOLE=y # CONFIG_CMD_CPU is not set # CONFIG_CMD_LICENSE is not set # # Boot commands # CONFIG_CMD_BOOTD=y CONFIG_CMD_BOOTM=y CONFIG_CMD_ELF=y CONFIG_CMD_GO=y CONFIG_CMD_RUN=y CONFIG_CMD_IMI=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_XIMG=y # # Environment commands # CONFIG_CMD_EXPORTENV=y CONFIG_CMD_IMPORTENV=y CONFIG_CMD_EDITENV=y CONFIG_CMD_SAVEENV=y CONFIG_CMD_ENV_EXISTS=y # # Memory commands # CONFIG_CMD_MEMORY=y CONFIG_CMD_CRC32=y # CONFIG_LOOPW is not set # CONFIG_CMD_MEMTEST is not set # CONFIG_CMD_MX_CYCLIC is not set # CONFIG_CMD_MEMINFO is not set # # Device access commands # CONFIG_CMD_DM=y # CONFIG_CMD_DEMO is not set CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_NAND is not set # CONFIG_CMD_SF is not set # CONFIG_CMD_SPI is not set # CONFIG_CMD_I2C is not set CONFIG_CMD_USB=y CONFIG_CMD_FPGA=y # CONFIG_CMD_GPIO is not set # # Shell scripting commands # CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y CONFIG_CMD_SOURCE=y # CONFIG_CMD_SETEXPR is not set # # Network commands # CONFIG_CMD_NET=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set # CONFIG_CMD_RARP is not set # CONFIG_CMD_DHCP is not set CONFIG_CMD_NFS=y # CONFIG_CMD_PING is not set # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set # CONFIG_CMD_DNS is not set # CONFIG_CMD_LINK_LOCAL is not set # # Misc commands # # CONFIG_CMD_TIME is not set CONFIG_CMD_MISC=y # CONFIG_CMD_TIMER is not set # # Boot timing # # CONFIG_BOOTSTAGE is not set CONFIG_BOOTSTAGE_USER_COUNT=20 CONFIG_BOOTSTAGE_STASH_ADDR=0 CONFIG_BOOTSTAGE_STASH_SIZE=4096 # # Power commands # # # Security commands # # CONFIG_CONSOLE_RECORD is not set CONFIG_SUPPORT_OF_CONTROL=y # # Device Tree Control # CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent" CONFIG_NET=y # CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_NETCONSOLE is not set CONFIG_NET_TFTP_VARS=y # # Device Drivers # # # Generic Driver Options # CONFIG_DM=y CONFIG_DM_WARN=y CONFIG_DM_DEVICE_REMOVE=y CONFIG_DM_STDIO=y CONFIG_DM_SEQ_ALIAS=y # CONFIG_REGMAP is not set # CONFIG_DEVRES is not set CONFIG_SIMPLE_BUS=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_OF_TRANSLATE=y # CONFIG_SPL_OF_TRANSLATE is not set # CONFIG_ADC is not set # CONFIG_ADC_EXYNOS is not set # CONFIG_ADC_SANDBOX is not set # CONFIG_CLK is not set # CONFIG_CPU is not set # # Hardware crypto devices # # CONFIG_FSL_CAAM is not set # # Demo for driver model # # CONFIG_DM_DEMO is not set # # DFU support # # CONFIG_DFU_TFTP is not set # # GPIO Support # # CONFIG_LPC32XX_GPIO is not set # CONFIG_VYBRID_GPIO is not set # # I2C support # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set # # LED Support # # CONFIG_LED is not set # CONFIG_SPL_LED is not set # # Multifunction device drivers # # CONFIG_MISC is not set # CONFIG_CROS_EC is not set # CONFIG_FSL_SEC_MON is not set # CONFIG_MXC_OCOTP is not set # CONFIG_PCA9551_LED is not set # CONFIG_RESET is not set # # MMC Host controller Support # # CONFIG_DM_MMC is not set # # MTD Support # # CONFIG_MTD is not set # # NAND Device Support # # CONFIG_NAND_DENALI is not set # CONFIG_NAND_VF610_NFC is not set # CONFIG_NAND_PXA3XX is not set # # Generic NAND options # # CONFIG_SPL_NAND_DENALI is not set # # SPI Flash Support # CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_ATMEL is not set # CONFIG_SPI_FLASH_EON is not set # CONFIG_SPI_FLASH_GIGADEVICE is not set # CONFIG_SPI_FLASH_MACRONIX is not set # CONFIG_SPI_FLASH_SPANSION is not set # CONFIG_SPI_FLASH_STMICRO is not set # CONFIG_SPI_FLASH_SST is not set # CONFIG_SPI_FLASH_WINBOND is not set CONFIG_SPI_FLASH_USE_4K_SECTORS=y # CONFIG_SPI_FLASH_DATAFLASH is not set # CONFIG_SPI_FLASH_MTD is not set CONFIG_DM_ETH=y # CONFIG_PHYLIB is not set CONFIG_NETDEVICES=y # CONFIG_ALTERA_TSE is not set # CONFIG_E1000 is not set # CONFIG_ETH_DESIGNWARE is not set # # PCI # # CONFIG_DM_PCI is not set # # Pin controllers # # CONFIG_PINCTRL is not set # CONFIG_SPL_PINCTRL is not set # # Power # # CONFIG_DM_PMIC is not set # CONFIG_DM_REGULATOR is not set # CONFIG_RAM is not set # # Remote Processor drivers # # # Real Time Clock # # CONFIG_DM_RTC is not set # # Serial drivers # CONFIG_REQUIRE_SERIAL_CONSOLE=y CONFIG_DEBUG_UART=y # CONFIG_DEBUG_UART_ALTERA_JTAGUART is not set # CONFIG_DEBUG_UART_ALTERA_UART is not set CONFIG_DEBUG_UART_NS16550=y # CONFIG_DEBUG_UART_S5P is not set # CONFIG_DEBUG_UART_ZYNQ is not set CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 # CONFIG_DEBUG_UART_BOARD_INIT is not set # CONFIG_DEBUG_UART_ANNOUNCE is not set # CONFIG_ALTERA_JTAG_UART is not set # CONFIG_ALTERA_UART is not set CONFIG_SYS_NS16550=y # # Sound support # # CONFIG_SOUND is not set # # SPI Support # # CONFIG_ALTERA_SPI is not set # CONFIG_CADENCE_QSPI is not set # CONFIG_DESIGNWARE_SPI is not set # CONFIG_EXYNOS_SPI is not set # CONFIG_FSL_DSPI is not set # CONFIG_FSL_QSPI is not set # CONFIG_ICH_SPI is not set # CONFIG_ROCKCHIP_SPI is not set # CONFIG_TEGRA114_SPI is not set # CONFIG_TEGRA20_SFLASH is not set # CONFIG_TEGRA20_SLINK is not set # CONFIG_TEGRA210_QSPI is not set # CONFIG_XILINX_SPI is not set # CONFIG_FSL_ESPI is not set # CONFIG_TI_QSPI is not set # CONFIG_DM_THERMAL is not set # # Timer Support # # CONFIG_TIMER is not set # # TPM support # CONFIG_USB=y CONFIG_DM_USB=y # # USB Host Controller Drivers # # CONFIG_USB_XHCI_HCD is not set # CONFIG_USB_XHCI is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI=y CONFIG_USB_EHCI_MARVELL=y # # MUSB Controller Driver # # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_GADGET is not set # # USB peripherals # CONFIG_USB_STORAGE=y # CONFIG_USB_KEYBOARD is not set # # Graphics support # # CONFIG_VIDEO_VESA is not set # CONFIG_VIDEO_LCD_ANX9804 is not set # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_DISPLAY_PORT is not set # CONFIG_VIDEO_TEGRA124 is not set # CONFIG_VIDEO_BRIDGE is not set # CONFIG_PHYS_TO_BUS is not set # # File systems # # # Library routines # # CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set CONFIG_HAVE_PRIVATE_LIBGCC=y # CONFIG_USE_PRIVATE_LIBGCC is not set CONFIG_SYS_HZ=1000 # CONFIG_SYS_VSNPRINTF is not set # CONFIG_USE_TINY_PRINTF is not set CONFIG_REGEX=y # CONFIG_LIB_RAND is not set # CONFIG_CMD_DHRYSTONE is not set # CONFIG_RSA is not set # CONFIG_TPM is not set # # Hashing Support # # CONFIG_SHA1 is not set # CONFIG_SHA256 is not set # CONFIG_SHA_HW_ACCEL is not set # # Compression Support # # CONFIG_LZ4 is not set # CONFIG_ERRNO_STR is not set # CONFIG_UNIT_TEST is not set -------------- next part -------------- /* * Device Tree file for Marvell Armada 385 development board * (RD-88F6820-GP) * * Copyright (C) 2014 Marvell * * Gregory CLEMENT * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without * any warranty of any kind, whether express or implied. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "armada-388.dtsi" #include / { model = "Marvell Armada 385 GP"; compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; chosen { stdout-path = "serial0:115200n8"; }; aliases { ethernet0 = ð0; ethernet1 = ð1; spi0 = &spi0; }; memory { device_type = "memory"; reg = <0x00000000 0x80000000>; /* 2 GB */ }; soc { ranges = ; internal-regs { spi at 10600 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; status = "okay"; u-boot,dm-pre-reloc; spi_flash: spi-flash at 0 { u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; compatible = "spidev", "spi-flash"; reg = <0>; /* Chip select 0 */ spi-max-frequency = <50000000>; m25p,fast-read; }; }; i2c at 11000 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay"; clock-frequency = <100000>; /* * The EEPROM located at adresse 54 is needed * for the boot - DO NOT ERASE IT - */ expander0: pca9555 at 20 { compatible = "nxp,pca9555"; pinctrl-names = "default"; pinctrl-0 = <&pca0_pins>; interrupt-parent = <&gpio0>; interrupts = <18 IRQ_TYPE_EDGE_FALLING>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x20>; }; expander1: pca9555 at 21 { compatible = "nxp,pca9555"; pinctrl-names = "default"; interrupt-parent = <&gpio0>; interrupts = <18 IRQ_TYPE_EDGE_FALLING>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x21>; }; }; serial at 12000 { /* * Exported on the micro USB connector CON16 * through an FTDI */ pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; u-boot,dm-pre-reloc; }; /* GE1 CON15 */ ethernet at 30000 { pinctrl-names = "default"; pinctrl-0 = <&ge1_rgmii_pins>; status = "okay"; phy = <&phy1>; phy-mode = "rgmii-id"; }; /* CON4 */ usb at 58000 { vcc-supply = <®_usb2_0_vbus>; status = "okay"; }; /* GE0 CON1 */ ethernet at 70000 { pinctrl-names = "default"; /* * The Reference Clock 0 is used to provide a * clock to the PHY */ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; status = "okay"; phy = <&phy0>; phy-mode = "rgmii-id"; }; mdio at 72004 { pinctrl-names = "default"; pinctrl-0 = <&mdio_pins>; phy0: ethernet-phy at 1 { reg = <1>; }; phy1: ethernet-phy at 0 { reg = <0>; }; }; sata at a8000 { pinctrl-names = "default"; pinctrl-0 = <&sata0_pins>, <&sata1_pins>; status = "okay"; #address-cells = <1>; #size-cells = <0>; sata0: sata-port at 0 { reg = <0>; target-supply = <®_5v_sata0>; }; sata1: sata-port at 1 { reg = <1>; target-supply = <®_5v_sata1>; }; }; sata at e0000 { pinctrl-names = "default"; pinctrl-0 = <&sata2_pins>, <&sata3_pins>; status = "okay"; #address-cells = <1>; #size-cells = <0>; sata2: sata-port at 0 { reg = <0>; target-supply = <®_5v_sata2>; }; sata3: sata-port at 1 { reg = <1>; target-supply = <®_5v_sata3>; }; }; sdhci at d8000 { pinctrl-names = "default"; pinctrl-0 = <&sdhci_pins>; cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; no-1-8-v; wp-inverted; bus-width = <8>; status = "okay"; }; /* CON5 */ usb3 at f0000 { vcc-supply = <®_usb2_1_vbus>; status = "okay"; }; /* CON7 */ usb3 at f8000 { vcc-supply = <®_usb3_vbus>; status = "okay"; }; }; pcie-controller { status = "okay"; /* * One PCIe units is accessible through * standard PCIe slot on the board. */ pcie at 1,0 { /* Port 0, Lane 0 */ status = "okay"; }; /* * The two other PCIe units are accessible * through mini PCIe slot on the board. */ pcie at 2,0 { /* Port 1, Lane 0 */ status = "okay"; }; pcie at 3,0 { /* Port 2, Lane 0 */ status = "okay"; }; }; gpio-fan { compatible = "gpio-fan"; gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; gpio-fan,speed-map = < 0 0 3000 1>; }; }; reg_usb3_vbus: usb3-vbus { compatible = "regulator-fixed"; regulator-name = "usb3-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; regulator-always-on; gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; }; reg_usb2_0_vbus: v5-vbus0 { compatible = "regulator-fixed"; regulator-name = "v5.0-vbus0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; regulator-always-on; gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; }; reg_usb2_1_vbus: v5-vbus1 { compatible = "regulator-fixed"; regulator-name = "v5.0-vbus1"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; regulator-always-on; gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; }; reg_usb2_1_vbus: v5-vbus1 { compatible = "regulator-fixed"; regulator-name = "v5.0-vbus1"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; regulator-always-on; gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; }; reg_sata0: pwr-sata0 { compatible = "regulator-fixed"; regulator-name = "pwr_en_sata0"; enable-active-high; regulator-always-on; }; reg_5v_sata0: v5-sata0 { compatible = "regulator-fixed"; regulator-name = "v5.0-sata0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; vin-supply = <®_sata0>; }; reg_12v_sata0: v12-sata0 { compatible = "regulator-fixed"; regulator-name = "v12.0-sata0"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; vin-supply = <®_sata0>; }; reg_sata1: pwr-sata1 { regulator-name = "pwr_en_sata1"; compatible = "regulator-fixed"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; regulator-always-on; gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; }; reg_5v_sata1: v5-sata1 { compatible = "regulator-fixed"; regulator-name = "v5.0-sata1"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; vin-supply = <®_sata1>; }; reg_12v_sata1: v12-sata1 { compatible = "regulator-fixed"; regulator-name = "v12.0-sata1"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; vin-supply = <®_sata1>; }; reg_sata2: pwr-sata2 { compatible = "regulator-fixed"; regulator-name = "pwr_en_sata2"; enable-active-high; regulator-always-on; gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; }; reg_5v_sata2: v5-sata2 { compatible = "regulator-fixed"; regulator-name = "v5.0-sata2"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; vin-supply = <®_sata2>; }; reg_12v_sata2: v12-sata2 { compatible = "regulator-fixed"; regulator-name = "v12.0-sata2"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; vin-supply = <®_sata2>; }; reg_sata3: pwr-sata3 { compatible = "regulator-fixed"; regulator-name = "pwr_en_sata3"; enable-active-high; regulator-always-on; gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; }; reg_5v_sata3: v5-sata3 { compatible = "regulator-fixed"; regulator-name = "v5.0-sata3"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; vin-supply = <®_sata3>; }; reg_12v_sata3: v12-sata3 { compatible = "regulator-fixed"; regulator-name = "v12.0-sata3"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; vin-supply = <®_sata3>; }; }; &pinctrl { pca0_pins: pca0_pins { marvell,pins = "mpp18"; marvell,function = "gpio"; }; }; -------------- next part -------------- A non-text attachment was scrubbed... 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