[U-Boot] [PATCH v1] drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3

York Sun
2015-11-30T17:16:39Z

On 11/04/2015 09:53 AM, York Sun wrote:
> Freescale LSCH3 platforms use two DDR controlers interleaving mode out of
> reset. It can be configured to disable one controller. To support this
> operation, the driver needs to detect and skip the disabled controller.
>
> Signed-off-by: York Sun <yorksun@freescale.com>
>
> ---
> Change log
> v1: Initial patch. Tested on LS2085AQDS and LS2085ARDB.
>
> arch/arm/include/asm/arch-fsl-layerscape/config.h | 7 ++++
> drivers/ddr/fsl/main.c | 1 +
> drivers/ddr/fsl/util.c | 40 +++++++++++++++++++++
> include/fsl_ddr.h | 1 +
> 4 files changed, 49 insertions(+)

Applied to fsl-qoriq master.

York