From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Mon, 30 Nov 2015 09:19:32 -0800 Subject: [U-Boot] [PATCH][v3] armv8: ls2085a: Add workaround of errata A009635 In-Reply-To: <1446705014-12975-1-git-send-email-prabhakar@freescale.com> References: <1446705014-12975-1-git-send-email-prabhakar@freescale.com> Message-ID: <565C8524.2020707@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/04/2015 10:30 PM, Prabhakar Kushwaha wrote: > If the core runs at higher than x3 speed of the platform, there is > possiblity about sev instruction to getting missed by other cores. > This is because of SoC Run Control block may not able to sample > the EVENTI(Sev) signals. > > Configure Run Control and EPU to periodically send out EVENTI signals to > wake up A57 cores. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v2: Updated description > Changes for v3: Added README and comments > > arch/arm/cpu/armv8/fsl-layerscape/README.lsch3 | 21 +++++++++++ > arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 ++++ > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 43 +++++++++++++++++++++++ > arch/arm/include/asm/arch-fsl-layerscape/config.h | 9 +++++ > arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 ++ > 5 files changed, 82 insertions(+) > Applied to fsl-qoriq master. Thanks. York