From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v6 2/2] armv8: fsl-layerscape: Make DDR non secure in MMU tables
Date: Wed, 2 Dec 2015 08:00:15 -0800 [thread overview]
Message-ID: <565F158F.2010503@freescale.com> (raw)
In-Reply-To: <CY1PR0301MB078094A8A1A38246D5EB3EFB8B0E0@CY1PR0301MB0780.namprd03.prod.outlook.com>
On 12/01/2015 10:38 PM, Hou Zhiqiang-B48286 wrote:
<snip>
>> /* Invalidate all table entries */
>> memset(level0_table, 0, PGTABLE_SIZE); @@ -269,6 +344,22 @@ static
>> inline void final_mmu_setup(void)
>> &final_mmu_table[i]);
>> }
>> }
>> + /* Set the secure memory to secure in MMU */ #ifdef
>> +CONFIG_SYS_MEM_RESERVE_SECURE
>> + if (gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED) { #ifdef
>> +CONFIG_FSL_LSCH3
>> + level2_table_secure = level2_table1 + 512; #elif
>> +defined(CONFIG_FSL_LSCH2)
>> + level2_table_secure = level2_table2 + 512; #endif
>> + /* update tlb pointer */
>> + gd->arch.tlb_addr = gd->secure_ram & ~0x3;
>
> The memory reserved for mmu table was lost? If it's better to record it and use for non-sec mmu table?
That can be arranged.
>
> If this func is called from non-secure state, for example EL2, the secure memory cannot be accessed and the PMD_SECT_NS bit should be cleared.
We need to setup secure memory at EL3 to have secure memory to begin with. But
you have a point here. Will look into it.
York
next prev parent reply other threads:[~2015-12-02 16:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-18 18:01 [U-Boot] [PATCH v6 0/2] Make most DDR non-secure in MMU while keep a small block secure York Sun
2015-11-18 18:01 ` [U-Boot] [PATCH v6 1/2] Reserve secure memory York Sun
2015-11-18 18:01 ` [U-Boot] [PATCH v6 2/2] armv8: fsl-layerscape: Make DDR non secure in MMU tables York Sun
2015-12-02 6:38 ` Hou Zhiqiang
2015-12-02 16:00 ` York Sun [this message]
2015-12-03 2:48 ` Hou Zhiqiang
2015-12-03 3:04 ` York Sun
2015-12-03 6:41 ` Hou Zhiqiang
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