From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5] arm: Add sata support on Layerscape ARMv8 board
Date: Thu, 3 Dec 2015 08:27:19 -0800 [thread overview]
Message-ID: <56606D67.2040307@freescale.com> (raw)
In-Reply-To: <1449026847-35951-1-git-send-email-Yuantian.Tang@freescale.com>
On 12/01/2015 07:27 PM, Yuantian.Tang at freescale.com wrote:
> From: Tang Yuantian <Yuantian.Tang@freescale.com>
>
> Freescale ARM-based Layerscape contains a SATA controller
> which comply with the serial ATA 3.0 specification and the
> AHCI 1.3 specification.
> This patch adds SATA feature on ls2080aqds, ls2080ardb and
> ls1043aqds boards.
>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> ---
> v5:
> - re-organize the code
> v4:
> - rebase to lastest git tree
> - add another ARMv8 platform which is ls1043aqds
> v3:
> - rename ls2085a to ls2080a
> - rebase to the latest git tree
> - replace the magic number with micro variable
> v2:
> - rebase to the latest git tree
>
> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 43 ++++++++++++++++++++++
> .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++
> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 31 ++++++++++++++++
> include/configs/ls1043aqds.h | 17 +++++++++
> include/configs/ls2080aqds.h | 18 +++++++++
> include/configs/ls2080ardb.h | 18 +++++++++
> 6 files changed, 131 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 8896b70..574ffc4 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -6,6 +6,8 @@
>
> #include <common.h>
> #include <fsl_ifc.h>
> +#include <ahci.h>
> +#include <scsi.h>
> #include <asm/arch/soc.h>
> #include <asm/io.h>
> #include <asm/global_data.h>
> @@ -120,7 +122,44 @@ void fsl_lsch3_early_init_f(void)
> erratum_a009203();
> }
>
Yuantian,
Please help me understand below.
> +#ifdef CONFIG_SCSI_AHCI_PLAT
> +int sata_init(void)
> +{
> + struct ccsr_ahci __iomem *ccsr_ahci;
> +
> + ccsr_ahci = (void *)CONFIG_SYS_SATA2;
> + out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
> + out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
You didn't set pp2c or pp3c. Is it because the default values are OK or
something else?
> +
> + ccsr_ahci = (void *)CONFIG_SYS_SATA1;
> + out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
> + out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
> +
> + ahci_init((void __iomem *)CONFIG_SYS_SATA1);
You only call ahci_init() here but not above. Is SATA2 active?
> + scsi_scan(0);
> +
> + return 0;
> +}
> +#endif
> +
> #elif defined(CONFIG_LS1043A)
> +#ifdef CONFIG_SCSI_AHCI_PLAT
> +int sata_init(void)
> +{
> + struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
> +
> + out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
> + out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
> + out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
> + out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
> +
> + ahci_init((void __iomem *)CONFIG_SYS_SATA);
> + scsi_scan(0);
> +
> + return 0;
> +}
> +#endif
> +
York
next prev parent reply other threads:[~2015-12-03 16:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-02 3:27 [U-Boot] [PATCH v5] arm: Add sata support on Layerscape ARMv8 board Yuantian.Tang at freescale.com
2015-12-02 4:12 ` Sinan Akman
2015-12-03 16:27 ` York Sun [this message]
2015-12-04 2:47 ` Yuantian Tang
2015-12-04 17:24 ` York Sun
2015-12-07 3:09 ` Yuantian Tang
2015-12-07 6:03 ` Sinan Akman
2015-12-07 7:04 ` Yuantian Tang
2015-12-07 7:28 ` Sinan Akman
2015-12-07 16:27 ` York Sun
2015-12-08 3:04 ` Yuantian Tang
2015-12-08 4:29 ` York Sun
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