From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eric Nelson <eric@nelint.com>
Date: Fri, 4 Dec 2015 11:53:56 -0700
Subject: [U-Boot] [PATCH] ARM: imx: fsl_esdhc: fix usage of low 4 bits
 of sysctl register
In-Reply-To: <5661DDDC.8030203@digi.com>
References: <1449250332-24052-1-git-send-email-eric@nelint.com>
 <5661DDDC.8030203@digi.com>
Message-ID: <5661E144.7040604@nelint.com>
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To: u-boot@lists.denx.de

Thanks Hector,

On 12/04/2015 11:39 AM, Hector Palacios wrote:
> Hi,
> 
> On 12/04/2015 06:32 PM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
>> Guard against their usage by hiding the bit mask macros on those
>> processors.
>>
...

>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>> index aa1b4cf..a4b87ce 100644
>> --- a/include/fsl_esdhc.h
>> +++ b/include/fsl_esdhc.h
>> @@ -25,10 +25,12 @@
>>  #define SYSCTL_INITA		0x08000000
>>  #define SYSCTL_TIMEOUT_MASK	0x000f0000
>>  #define SYSCTL_CLOCK_MASK	0x0000fff0
>> +#if !defined(CONFIG_MX6)
> 
> Per your commit message should this be
> #if (!defined(CONFIG_MX6) && !defined(CONFIG_MX7))
> 

Good catch.

Will fix in a V2.