From mboxrd@z Thu Jan  1 00:00:00 1970
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 9 Dec 2015 11:04:27 +0100
Subject: [U-Boot] [PATCH V2] ARM: imx: fsl_esdhc: fix usage of low 4
 bits of sysctl register
In-Reply-To: <1449257568-7316-1-git-send-email-eric@nelint.com>
References: <5661DDDC.8030203@digi.com>
 <1449257568-7316-1-git-send-email-eric@nelint.com>
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On 12/04/2015 08:32 PM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
> 
> Guard against their usage by hiding the bit mask macros on those
> processors.
> 
> These bits are used to prevent glitches when changing clocks on
> i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.
> 
> From the i.MX6DQ RM:
> 	To prevent possible glitch on the card clock, clear the
> 	FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
> 	or DVS in System Control Register) or setting RSTA bit.
> 
> Signed-off-by: Eric Nelson <eric@nelint.com>

Reviewed-by: Hector Palacios <hector.palacios@digi.com>