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From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/3] board: atmel: siemens: clean up PLLB code
Date: Thu, 10 Dec 2015 10:34:51 +0100	[thread overview]
Message-ID: <5669473B.7050009@denx.de> (raw)
In-Reply-To: <1449635383-8180-4-git-send-email-wenyou.yang@atmel.com>

Hello Wenyou,

Am 09.12.2015 um 05:29 schrieb Wenyou Yang:
> Due to introducing the new PLLB clock handle functions,
> use these functions to clean up the PLLB enable code.
>
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
>
>   board/siemens/smartweb/smartweb.c |    6 +-----
>   board/siemens/taurus/taurus.c     |    6 +-----
>   2 files changed, 2 insertions(+), 10 deletions(-)

Tested on the smartweb board, see log:
http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/29/steps/shell/logs/tbotlog

Tested-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
>
> diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
> index e7ee65c..47a60a7 100644
> --- a/board/siemens/smartweb/smartweb.c
> +++ b/board/siemens/smartweb/smartweb.c
> @@ -115,12 +115,8 @@ static void smartweb_macb_hw_init(void)
>
>   void at91_udp_hw_init(void)
>   {
> -	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> -
>   	/* Enable PLLB */
> -	writel(get_pllb_init(), &pmc->pllbr);
> -	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
> -		;
> +	at91_pllb_clk_enable(get_pllb_init());
>
>   	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
>   	at91_periph_clk_enable(ATMEL_ID_UDP);
> diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
> index 9374064..b0385d8 100644
> --- a/board/siemens/taurus/taurus.c
> +++ b/board/siemens/taurus/taurus.c
> @@ -289,12 +289,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
>
>   void at91_udp_hw_init(void)
>   {
> -	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> -
>   	/* Enable PLLB */
> -	writel(get_pllb_init(), &pmc->pllbr);
> -	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
> -		;
> +	at91_pllb_clk_enable(get_pllb_init());
>
>   	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
>   	at91_periph_clk_enable(ATMEL_ID_UDP);
>

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

  reply	other threads:[~2015-12-10  9:34 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-09  4:29 [U-Boot] [PATCH 0/3] ARM: at91: add PLLB handle functions Wenyou Yang
2015-12-09  4:29 ` [U-Boot] [PATCH 1/3] ARM: at91: clock: add PLLB enable/disable functions Wenyou Yang
2015-12-10  9:33   ` Heiko Schocher
2015-12-10 12:03     ` Yang, Wenyou
2016-01-26 15:35   ` Andreas Bießmann
2015-12-09  4:29 ` [U-Boot] [PATCH 2/3] drivers: usb: ohci-at91: clean up the PLLB code Wenyou Yang
2015-12-10  9:34   ` Heiko Schocher
2016-01-26 15:30   ` Andreas Bießmann
2015-12-09  4:29 ` [U-Boot] [PATCH 3/3] board: atmel: siemens: clean up " Wenyou Yang
2015-12-10  9:34   ` Heiko Schocher [this message]
2016-01-26 15:38   ` Andreas Bießmann

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