From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Wed, 16 Dec 2015 17:03:07 +0800 Subject: [U-Boot] [PATCH 3/5] armv8/ls1043a: Implement workaround for PEX erratum A009929 In-Reply-To: <1449478736-7173-3-git-send-email-Mingkai.Hu@freescale.com> References: <1449478736-7173-1-git-send-email-Mingkai.Hu@freescale.com> <1449478736-7173-3-git-send-email-Mingkai.Hu@freescale.com> Message-ID: <567128CB.3090808@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 12/07/2015 04:58 PM, Mingkai Hu wrote: > Consecutive write transactions from core to PCI express outbound > path hangs after 25 to 30 transactions depending on core freq. > This erratum enable the mbist clock through COP register setting. > > Signed-off-by: Mingkai Hu > --- Applied to u-boot-fsl-qoriq master. Awaiting upstream. York