From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 16 Feb 2016 09:39:35 -0700 Subject: [U-Boot] test/py main_signon In-Reply-To: <56C3487B.5070802@xilinx.com> References: <56C3121E.7060406@xilinx.com> <56C324F8.6090106@denx.de> <56C3487B.5070802@xilinx.com> Message-ID: <56C350C7.90804@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/16/2016 09:04 AM, Michal Simek wrote: > Hi Heiko, > > On 16.2.2016 14:32, Heiko Schocher wrote: >> Hello Michal, >> >> Am 16.02.2016 um 13:12 schrieb Michal Simek: >>> Hi Stephen, >>> >>> trying to run the latest testing on zynq board and getting this >>> main_signon error. >>> >>> This is what I am running >>> ./test/py/test.py --bd zynq_zc702 --build --board-identity zc702 >>> and getting below. >> >> Does this board has SPL support without SPL serial output? > > I do load u-boot via jtag that's why SPL logs are not visible. > >> If so, can you try my patch: >> http://patchwork.ozlabs.org/patch/583348/ > > I have applied your patch but it is still not working. > > If I run full flow with SPL then I can't see any issue. I assume this is resolved then?