[U-Boot] Newbie SPL question for socfpga_sockit

George Broz
2016-02-17T21:54:16Z

Hello,

Sorry for the newbie question...

I have an Altera/Terasic board (socfpga_sockit) that has issues recognizing
USB storage devices (roughly 60% good / 40% bad):

SOCFPGA_CYCLONE5 # usb start
(Re)start USB...
USB0: scanning bus 0 for devices... DW_USB: Transfer completion
interrupt timeout
Timed out waiting for channel to disable
1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found

The pre-made U-Boot SPL & image that come with the board have version:
U-Boot 2013.01.01 (Aug 08 2014 - 10:46:23)

(Old!)

I need to rebuild U-Boot for this board to add md5sum and hopefully fix the
USB issues. When I've rebuilt the u-boot.img from the 2013.01.01 branch
of the (Altera maintained) source, U-boot boots, but the USB problems
get worse (100% bad):

USB0: Core Release: 2.93a
dwc_otg_core_host_init: Unable to clear halt on channel 1 (timeout
HCCHAR 0xC0000000 @ffb40520)
dwc_otg_core_host_init: Unable to clear halt on channel 2 (timeout
HCCHAR 0xC0000000 @ffb40540

(I've confirmed that CONFIG_CMD_USB and CONFIG_USB_STORAGE are
defined and have tried turning on and off 'dcache' as suggested elsewhere
to no avail).

If I try a later release (e.g. v2016.01 which seems to support the Terasic
board explicitly) the boot process stops just after loading the SPL.

At this point I have only been changing the u-boot.img component, not the
SPL (in the a2 partition of the MMC).

The documentation from Altera about generating the SPL seems to require
using Qsys/Quartus tools which I'd really like to avoid.

I can produce u-boot-spl.bin / u-boot.img from
make socfpga_sockit_defconfig; make all.

My newbie question ... should be I able to use directly the u-boot-spl.bin
generated by the build to replace the SPL on the board?

(I'm hoping the USB issues resolve themselves when I'm able to get
the later version of U-Boot running...)

Thanks for any input...

--George Broz
Moog Industrial Group