[U-Boot] [PATCH] arm: socfpga: Enable DM_I2C

Marek Vasut
2016-03-18T11:20:16Z

On 03/18/2016 08:55 AM, Stefan Roese wrote:
> The designware I2C driver now supports DM. So lets use it and enable
> DM_I2C for this platform per default.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/dts/socfpga.dtsi | 4 ++++
> include/configs/socfpga_common.h | 16 ----------------
> 3 files changed, 5 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index e5f57ef..98c1f10 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -516,6 +516,7 @@ config ARCH_SOCFPGA
> select DM
> select DM_SPI_FLASH
> select DM_SPI
> + select DM_I2C
>
> config TARGET_CM_T43
> bool "Support cm_t43"
> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> index 8588221..fe55722 100644
> --- a/arch/arm/dts/socfpga.dtsi
> +++ b/arch/arm/dts/socfpga.dtsi
> @@ -23,6 +23,10 @@
> spi0 = &qspi;
> spi1 = &spi0;
> spi2 = &spi1;
> + i2c0 = &i2c0;
> + i2c1 = &i2c1;
> + i2c2 = &i2c2;
> + i2c3 = &i2c3;

Something tells me that you should be super-careful here, because some
socfpga boards actually do use i2c. But just adding the aliases here
without actually enabling the i2c via DT now will cause breakage.

One way to solve it is to enable all four buses in socfpga-cyclone5.dtsi
but that's not something I find very appealing. The other is to keep the
patch this way and wait until someone complains his i2c is not working.

What do you think ?

> };
>
> cpus {
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index cd48c9e..58e4827 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -177,23 +177,7 @@
> /*
> * I2C support
> */
> -#define CONFIG_SYS_I2C
> #define CONFIG_SYS_I2C_DW
> -#define CONFIG_SYS_I2C_BUS_MAX 4
> -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS
> -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS
> -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS
> -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS
> -/* Using standard mode which the speed up to 100Kb/s */
> -#define CONFIG_SYS_I2C_SPEED 100000
> -#define CONFIG_SYS_I2C_SPEED1 100000
> -#define CONFIG_SYS_I2C_SPEED2 100000
> -#define CONFIG_SYS_I2C_SPEED3 100000
> -/* Address of device when used as slave */
> -#define CONFIG_SYS_I2C_SLAVE 0x02
> -#define CONFIG_SYS_I2C_SLAVE1 0x02
> -#define CONFIG_SYS_I2C_SLAVE2 0x02
> -#define CONFIG_SYS_I2C_SLAVE3 0x02
> #ifndef __ASSEMBLY__
> /* Clock supplied to I2C controller in unit of MHz */
> unsigned int cm_get_l4_sp_clk_hz(void);
>

--
Best regards,
Marek Vasut