From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] Newbie SPL question for socfpga_sockit
Date: Sun, 20 Mar 2016 17:44:21 +0100 [thread overview]
Message-ID: <56EED365.5030802@denx.de> (raw)
In-Reply-To: <56ED33A4.7050409@electromag.com.au>
On 03/19/2016 12:10 PM, Phil Reid wrote:
> On 19/03/2016 5:22 AM, George Broz wrote:
>> On 18 March 2016 at 12:32, Marek Vasut <marex@denx.de> wrote:
>>> On 03/18/2016 07:59 PM, George Broz wrote:
>>>> On 16 March 2016 at 18:35, Marek Vasut <marex@denx.de> wrote:
>>>>> On 03/16/2016 05:17 PM, George Broz wrote:
>>>>>> On 15 March 2016 at 18:29, George Broz <brozgeo@gmail.com> wrote:
>>>>>>
>>>>>>>
>>>>>>> Hello again -
>>>>>>>
>>>>>>> So under the assumption my SoCKit h/w was broken, I bought a new
>>>>>>> board.
>>>>>>> They are back ordered on SoCKit boards, so I got a DE0-Nano-SoC
>>>>>>> instead.
>>>>>>>
>>>>>>> I build the v2016.03 (release) version of u-boot-with-spl.sfp.
>>>>>>>
>>>>>>> I power-up the (brand new) board and get:
>>>>>>>
>>>>>>> U-Boot SPL 2016.03 (Mar 15 2016 - 14:52:42)
>>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory
>>>>>>> calibration
>>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>>> SDRAM calibration failed.
>>>>>>> ### ERROR ### Please RESET the board ###
>>>>>>>
>>>>>>> U-Boot SPL 2016.03 (Mar 15 2016 - 14:52:42)
>>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory
>>>>>>> calibration
>>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>>> SDRAM calibration failed.
>>>>>>> ### ERROR ### Please RESET the board ###
>>>>>>>
>>>>>>> U-Boot SPL 2016.03 (Mar 15 2016 - 14:52:42)
>>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory
>>>>>>> calibration
>>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
>>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>>> Trying to boot from MMC
>>>>>>>
>>>>>>> U-Boot 2016.03 (Mar 15 2016 - 14:52:42 -0700)
>>>>>>>
>>>>>>> CPU: Altera SoCFPGA Platform
>>>>>>> FPGA: Altera Cyclone V, SE/A4 or SX/C4, version 0x0
>>>>>>> BOOT: SD/MMC Internal Transceiver (3.0V)
>>>>>>> Watchdog enabled
>>>>>>> I2C: ready
>>>>>>> DRAM: 1 GiB
>>>>>>> MMC: dwmmc0 at ff704000: 0
>>>>>>> In: serial
>>>>>>> Out: serial
>>>>>>> Err: serial
>>>>>>> Model: Terasic DE0-Nano(Atlas)
>>>>>>> Net:
>>>>>>> Error: ethernet at ff702000 address not set.
>>>>>>> No ethernet found.
>>>>>>> Hit any key to stop autoboot: 0
>>>>>>> =>
>>>>>>>
>>>>>>> And this is a good case... usually it doesn't succeed after the
>>>>>>> fourth try
>>>>>>> and I have to cycle power 4 or 5 times before I get lucky.
>>>>>>>
>>>>>>> If I do get lucky and then try to see a USB storage device, then
>>>>>>> I get:
>>>>>>>
>>>>>>> =>
>>>>>>> => usb start
>>>>>>> starting USB...
>>>>>>> USB0: Core Release: 2.93a
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> dwc_otg_core_host_init: Timeout!
>>>>>>> scanning bus 0 for devices... 1 USB Device(s) found
>>>>>>> =>
>>>>>>>
>>>>>>> (Every time)
>>>>>>>
>>>>>>> The version of u-boot SPL that ships with the board:
>>>>>>> U-Boot SPL 2013.01.01 (Dec 29 2014 - 15:29:15)
>>>>>>>
>>>>>>> boots every time and has limited USB capability as
>>>>>>> it can see some USB sticks, but not others.
>>>>>>>
>>>>>>>
>>>>>>> Anyway - brand new board - same old symptoms.
>>>>>>>
>>>>>>> Is it perhaps a toolchain problem?? I'm using:
>>>>>>>
>>>>>>> Thread model: posix
>>>>>>> gcc version 4.9.3 20141031 (prerelease) (Linaro GCC 4.9-2014.11)
>>>>>>>
>>>>>>> COLLECT_GCC=arm-poky-linux-gnueabi-gcc
>>>>>>> COLLECT_LTO_WRAPPER=/opt/poky/1.7.1/sysroots/x86_64-pokysdk-linux/usr/libexec/arm-poky-linux-gnueabi/gcc/arm-poky-linux-gnueabi/4.9.3/lto-wrapper
>>>>>>>
>>>>>>> < snip >
>>>>>>>
>>>>>>> Any advice greatly appreciated.
>>>>>>>
>>>>>>>
>>>>>>> Regards,
>>>>>>> --George Broz
>>>>>>
>>>>>> Rebuilt using the Altera EDS15.0 toolchain:
>>>>>>
>>>>>> arm-altera-eabi-gcc --version
>>>>>> arm-altera-eabi-gcc (Sourcery CodeBench Lite 2014.11-13) 4.9.1
>>>>>> Copyright (C) 2014 Free Software Foundation, Inc.
>>>>>> This is free software; see the source for copying conditions.
>>>>>> There is NO
>>>>>> warranty; not even for MERCHANTABILITY or FITNESS FOR A
>>>>>> PARTICULAR PURPOSE.
>>>>>>
>>>>>>
>>>>>> Get same result ... mostly failing calibration, non-working USB....
>>>>>>
>>>>>> U-Boot SPL 2016.03 (Mar 16 2016 - 08:27:20)
>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>> SDRAM calibration failed.
>>>>>> ### ERROR ### Please RESET the board ###
>>>>>>
>>>>>> U-Boot SPL 2016.03 (Mar 16 2016 - 08:27:20)
>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>> SDRAM calibration failed.
>>>>>> ### ERROR ### Please RESET the board ###
>>>>>>
>>>>>> U-Boot SPL 2016.03 (Mar 16 2016 - 08:27:20)
>>>>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>>>>>> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
>>>>>> drivers/ddr/altera/sequencer.c: Calibration complete
>>>>>> Trying to boot from MMC
>>>>>>
>>>>>>
>>>>>> U-Boot 2016.03 (Mar 16 2016 - 08:27:20 -0700)
>>>>>>
>>>>>> Does this work for anybody else?
>>>>>> Is it in anyone's experience that these (cheaper) Terasic
>>>>>> eval boards are generally out of spec?
>>>>>>
>>>>>> Is there a way to relax the calibration parameters? the USB
>>>>>> parameters?
>>>>>>
>>>>>> Would it help if I posted debug output?
>>>>>
>>>>> Sorry for the late reply, I am horribly overloaded now. I asked
>>>>> someone
>>>>> in #u-boot who has the DE0-NANO-SOC board to test latest u-boot/master
>>>>> on it and it apparently worked for him. I should get some more
>>>>> feedback
>>>>> in the morning [ see http://pastebin.com/CM1QJGnh ] .
>>>>>
>>>>> Still, this is getting real creepy. You are the second person who is
>>>>> complaining about misbehavior of terasic boards with mainline u-boot
>>>>> and whatever I do, I cannot replicate this.
>>>>>
>>>>> I am at least CCing the Altera guys. Sorry I have no better suggestion
>>>>> for you :(
>>>>>
>>>>> Best regards,
>>>>> Marek Vasut
>>>>
>>>>
>>>> Hi Marek,
>>>>
>>>> I've got a third board coming to me in the mail (another
>>>> DE0-NANO-SOC). I'll post
>>>> how that goes.If it fails, maybe I'll send it to you...
>>>>
>>>> I've also sent Terasic an email.
>>>>
>>>> One question - after you (your collegue's) SoCKit (Nano) get past
>>>> memory
>>>> calibration, does USB work (i.e. does the u-boot USB subsystem
>>>> recognize mass
>>>> storage devices)?
>>>>
>>>> I'm beginning to look for solutions that don't involve rebuilding the
>>>> SPL or using USB.
>>>
>>> Try "dcache off" before "usb reset", I had trouble with usb in recent
>>> versions due to cache problems. If this works, I am happy to give you
>>> a workaround, but I would also love a real solution ... which I do not
>>> have for 3+ months now :'-(
>>>
>>> Best regards,
>>> Marek Vasut
>>
>> Thanks, but nope - same story:
>> => dcache off
>> => dcache
>> Data (writethrough) Cache is OFF
>> => usb reset
>> resetting USB...
>> USB0: Core Release: 0.000
>> SNPSID invalid (not DWC2 OTG device): 00000000
>> Port not available.
>> USB1: Core Release: 2.93a
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout!
>> dwc_otg_core_host_init: Timeout! ...
>> :
>> :
>>
>
> USB worked on my board for 2016.1
> Don't think I did anything special.
> Testing was limited, could see files on the USB partition etc.
Ther are some sticks which trigger an USB issue, but it's more of an
issue in the cache configuration than the USB controller itself I think.
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-03-20 16:44 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-17 21:54 [U-Boot] Newbie SPL question for socfpga_sockit George Broz
2016-02-18 2:45 ` Phil Reid
2016-03-02 2:40 ` George Broz
2016-03-02 3:49 ` Phil Reid
2016-03-03 6:49 ` George Broz
2016-03-03 7:11 ` Phil Reid
2016-03-03 14:57 ` George Broz
2016-03-09 1:42 ` Phil Reid
2016-03-09 10:55 ` Marek Vasut
2016-03-09 16:06 ` George Broz
2016-03-16 1:29 ` George Broz
2016-03-16 16:17 ` George Broz
2016-03-17 1:35 ` Marek Vasut
2016-03-18 18:59 ` George Broz
2016-03-18 19:32 ` Marek Vasut
2016-03-18 21:22 ` George Broz
2016-03-19 11:10 ` Phil Reid
2016-03-20 16:44 ` Marek Vasut [this message]
2016-03-20 16:49 ` Marek Vasut
2016-03-29 1:56 ` George Broz
2016-03-29 17:46 ` Marek Vasut
2016-03-20 15:55 ` Dinh Nguyen
2016-03-20 16:42 ` Marek Vasut
2016-03-22 17:06 ` Dinh Nguyen
2016-03-26 20:52 ` Marek Vasut
2016-04-05 8:33 ` Phil Reid
2016-04-05 22:03 ` Marek Vasut
2016-04-06 0:31 ` George Broz
2016-04-06 0:45 ` Marek Vasut
2016-04-06 1:17 ` George Broz
2016-04-06 10:43 ` Marek Vasut
2016-04-07 1:42 ` George Broz
2016-04-07 2:05 ` Marek Vasut
2016-04-07 13:14 ` George Broz
2016-04-07 20:39 ` Marek Vasut
2016-04-07 23:31 ` George Broz
2016-04-07 23:36 ` Marek Vasut
2016-04-07 23:51 ` George Broz
2016-04-08 5:16 ` Stefan Roese
2016-04-08 12:36 ` Marek Vasut
2016-04-08 22:40 ` George Broz
2016-04-10 17:47 ` Marek Vasut
2016-04-11 2:03 ` George Broz
2016-04-11 14:02 ` Marek Vasut
2016-04-12 15:53 ` Dinh Nguyen
2016-04-12 16:00 ` Marek Vasut
2016-04-12 16:08 ` Dinh Nguyen
2016-04-12 16:11 ` Marek Vasut
2016-04-13 9:25 ` Chin Liang See
2016-04-12 16:09 ` Stefan Roese
2016-04-13 11:09 ` Marek Vasut
2016-04-06 7:00 ` Phil Reid
2016-04-06 11:51 ` Marek Vasut
2016-04-06 15:04 ` Phil Reid
2016-04-06 20:38 ` Marek Vasut
2016-03-29 1:44 ` George Broz
2016-03-29 17:45 ` Marek Vasut
2016-03-03 21:16 ` George Broz
2016-03-02 22:54 ` Dinh Nguyen
2016-03-02 23:04 ` Marek Vasut
2016-03-02 23:08 ` Dinh Nguyen
2016-03-02 23:24 ` Marek Vasut
2016-03-03 14:48 ` Dinh Nguyen
2016-03-03 14:51 ` Marek Vasut
2016-03-03 22:00 ` George Broz
2016-03-03 22:09 ` Marek Vasut
[not found] ` <CAMcKmiG8OMmbZ262n8gL7eM=WAgaakaZ5rWzCC1vYu7yzGBYAA@mail.gmail.com>
[not found] ` <56D8BDD7.8070604@denx.de>
[not found] ` <CAMcKmiGrZ94sZKY85Y3aC1_fwgV8oJeAJ0O71bY=gMxUGBp=FQ@mail.gmail.com>
[not found] ` <56D8C3A0.9020204@denx.de>
2016-03-03 23:46 ` George Broz
2016-03-04 16:52 ` Dinh Nguyen
2016-03-04 16:06 ` Dinh Nguyen
2016-03-04 19:03 ` Marek Vasut
2016-03-21 14:05 ` Chin Liang See
2016-03-21 15:45 ` Chin Liang See
2016-03-23 15:00 ` Chin Liang See
2016-03-23 15:37 ` [U-Boot] SoCFPGA cache / S-bit problem - was " Stefan Roese
2016-04-06 16:35 ` Dinh Nguyen
2016-04-06 16:46 ` Marek Vasut
2016-04-06 16:51 ` Dinh Nguyen
2016-03-03 6:55 ` [U-Boot] " George Broz
2016-03-03 9:48 ` Marek Vasut
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