[U-Boot] [PATCH v5 0/4] This series add MUSB support on PIC32MZDA Starter Kit.

[U-Boot] [PATCH v5 0/4] This series add MUSB support on PIC32MZDA Starter Kit.

[Purna Chandra Mandal]

It contains fix for core MUSB driver, platform specific
glue for PIC32 and board support.

Changes in v5:
- drop OR'ing irqreturn_t in pic32_interrupt().

Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and error prints
- dts: add USB clock to musb node
- add missing CONFIG_PIC32_USB in defconfig

Changes in v3:
- add arch specific reads{bwlq}, writes{bwlq} in respective arch io.h
- remove reads{bwlq}, writes{bwlq} in musb-new driver

Changes in v2:
- compilation fix in drivers/usb/musb-new/linux-compat.h seperated
- compilation fix in drivers/gadget/f_mass_storage.c seperated

Purna Chandra Mandal (4):
  arm: add missing writes[bwql], reads[bwql].
  drivers: remove writes{b,w,l,q} and reads{b,w,l,q}.
  drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG
    controller.
  board: pic32mzda: enable USB-host, USB-storage support.

 arch/arm/include/asm/io.h           |   7 +
 arch/mips/dts/pic32mzda.dtsi        |  12 ++
 arch/mips/dts/pic32mzda_sk.dts      |   4 +
 configs/pic32mzdask_defconfig       |   6 +
 drivers/mtd/nand/pxa3xx_nand.c      |   8 -
 drivers/usb/musb-new/Kconfig        |   7 +
 drivers/usb/musb-new/Makefile       |   1 +
 drivers/usb/musb-new/linux-compat.h |   7 -
 drivers/usb/musb-new/musb_core.c    |   2 +-
 drivers/usb/musb-new/pic32.c        | 288 ++++++++++++++++++++++++++++++++++++
 include/configs/pic32mzdask.h       |   7 +
 11 files changed, 333 insertions(+), 16 deletions(-)
 create mode 100644 drivers/usb/musb-new/pic32.c

-- 
1.8.3.1

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Purna Chandra Mandal]

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/io.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 75773bd..9d185a6 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -284,6 +284,13 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define insw_p(port,to,len)		insw(port,to,len)
 #define insl_p(port,to,len)		insl(port,to,len)
 
+#define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
+#define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
+#define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
+#define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
+#define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
+#define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
+
 /*
  * ioremap and friends.
  *
-- 
1.8.3.1

[U-Boot] [PATCH v5 2/4] drivers: remove writes{b, w, l, q} and reads{b, w, l, q}.

[Purna Chandra Mandal]

Definition of writes{bwlq}, reads{bwlq} are now added into arch specific
asm/io.h. So removing them from driver to fix re-definition error

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/pxa3xx_nand.c      | 8 --------
 drivers/usb/musb-new/linux-compat.h | 7 -------
 2 files changed, 15 deletions(-)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 9392742..d529467 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -19,14 +19,6 @@
 
 #include "pxa3xx_nand.h"
 
-/* Some U-Boot compatibility macros */
-#define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
-
 #define TIMEOUT_DRAIN_FIFO	5	/* in ms */
 #define	CHIP_DELAY_TIMEOUT	200
 #define NAND_STOP_DELAY		40
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index 1fc9391..9244977 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -13,13 +13,6 @@
 		printf(fmt, ##args);		\
 	ret_warn; })
 
-#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
-
 #define device_init_wakeup(dev, a) do {} while (0)
 
 #define platform_data device_data
-- 
1.8.3.1

[U-Boot] [PATCH v5 3/4] drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.

[Purna Chandra Mandal]

This driver adds support of PIC32 MUSB OTG controller as dual role device.
It implements platform specific glue to reuse musb core.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

---

Changes in v5:
- drop OR'ing irqreturn_t in pic32_interrupt().

Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and error prints

Changes in v3: None
Changes in v2: None

 drivers/usb/musb-new/Kconfig     |   7 +
 drivers/usb/musb-new/Makefile    |   1 +
 drivers/usb/musb-new/musb_core.c |   2 +-
 drivers/usb/musb-new/pic32.c     | 288 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 297 insertions(+), 1 deletion(-)
 create mode 100644 drivers/usb/musb-new/pic32.c

diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig
index 6a6cb93..4e8a543 100644
--- a/drivers/usb/musb-new/Kconfig
+++ b/drivers/usb/musb-new/Kconfig
@@ -15,6 +15,13 @@ config USB_MUSB_GADGET
 
 if USB_MUSB_HOST || USB_MUSB_GADGET
 
+config USB_MUSB_PIC32
+	bool "Enable Microchip PIC32 DRC USB controller"
+	depends on DM_USB && MACH_PIC32
+	help
+	  Say y to enable PIC32 USB DRC controller support
+	  if it is available on your Microchip PIC32 platform.
+
 config USB_MUSB_SUNXI
 	bool "Enable sunxi OTG / DRC USB controller"
 	depends on ARCH_SUNXI
diff --git a/drivers/usb/musb-new/Makefile b/drivers/usb/musb-new/Makefile
index 072d516..df1c3c8 100644
--- a/drivers/usb/musb-new/Makefile
+++ b/drivers/usb/musb-new/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
 obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
 obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
 obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
+obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o
 obj-$(CONFIG_USB_MUSB_SUNXI) += sunxi.o
 
 ccflags-y := $(call cc-option,-Wno-unused-variable) \
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index a6d6af6..dd0443c 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -259,7 +259,7 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
 	}
 }
 
-#if !defined(CONFIG_USB_MUSB_AM35X)
+#if !defined(CONFIG_USB_MUSB_AM35X) && !defined(CONFIG_USB_MUSB_PIC32)
 /*
  * Unload an endpoint's FIFO
  */
diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c
new file mode 100644
index 0000000..c888c64
--- /dev/null
+++ b/drivers/usb/musb-new/pic32.c
@@ -0,0 +1,288 @@
+/*
+ * Microchip PIC32 MUSB "glue layer"
+ *
+ * Copyright (C) 2015, Microchip Technology Inc.
+ *  Cristian Birsan <cristian.birsan@microchip.com>
+ *  Purna Chandra Mandal <purna.mandal@microchip.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Based on the dsps "glue layer" code.
+ */
+
+#include <common.h>
+#include <linux/usb/musb.h>
+#include "linux-compat.h"
+#include "musb_core.h"
+#include "musb_uboot.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PIC32_TX_EP_MASK	0x0f		/* EP0 + 7 Tx EPs */
+#define PIC32_RX_EP_MASK	0x0e		/* 7 Rx EPs */
+
+#define MUSB_SOFTRST		0x7f
+#define  MUSB_SOFTRST_NRST	BIT(0)
+#define  MUSB_SOFTRST_NRSTX	BIT(1)
+
+#define USBCRCON		0
+#define  USBCRCON_USBWKUPEN	BIT(0)  /* Enable Wakeup Interrupt */
+#define  USBCRCON_USBRIE	BIT(1)  /* Enable Remote resume Interrupt */
+#define  USBCRCON_USBIE		BIT(2)  /* Enable USB General interrupt */
+#define  USBCRCON_SENDMONEN	BIT(3)  /* Enable Session End VBUS monitoring */
+#define  USBCRCON_BSVALMONEN	BIT(4)  /* Enable B-Device VBUS monitoring */
+#define  USBCRCON_ASVALMONEN	BIT(5)  /* Enable A-Device VBUS monitoring */
+#define  USBCRCON_VBUSMONEN	BIT(6)  /* Enable VBUS monitoring */
+#define  USBCRCON_PHYIDEN	BIT(7)  /* PHY ID monitoring enable */
+#define  USBCRCON_USBIDVAL	BIT(8)  /* USB ID value */
+#define  USBCRCON_USBIDOVEN	BIT(9)  /* USB ID override enable */
+#define  USBCRCON_USBWK		BIT(24) /* USB Wakeup Status */
+#define  USBCRCON_USBRF		BIT(25) /* USB Resume Status */
+#define  USBCRCON_USBIF		BIT(26) /* USB General Interrupt Status */
+
+/* PIC32 controller data */
+struct pic32_musb_data {
+	struct musb_host_data mdata;
+	struct device dev;
+	void __iomem *musb_glue;
+};
+
+#define to_pic32_musb_data(d)	\
+	container_of(d, struct pic32_musb_data, dev)
+
+static void pic32_musb_disable(struct musb *musb)
+{
+	/* no way to shut the controller */
+}
+
+static int pic32_musb_enable(struct musb *musb)
+{
+	/* soft reset by NRSTx */
+	musb_writeb(musb->mregs, MUSB_SOFTRST, MUSB_SOFTRST_NRSTX);
+	/* set mode */
+	musb_platform_set_mode(musb, musb->board_mode);
+
+	return 0;
+}
+
+static irqreturn_t pic32_interrupt(int irq, void *hci)
+{
+	struct musb  *musb = hci;
+	irqreturn_t ret = IRQ_NONE;
+	u32 epintr, usbintr;
+
+	/* ack usb core interrupts */
+	musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
+	if (musb->int_usb)
+		musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
+
+	/* ack endpoint interrupts */
+	musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & PIC32_RX_EP_MASK;
+	if (musb->int_rx)
+		musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
+
+	musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & PIC32_TX_EP_MASK;
+	if (musb->int_tx)
+		musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
+
+	/* drop spurious RX and TX if device is disconnected */
+	if (musb->int_usb & MUSB_INTR_DISCONNECT) {
+		musb->int_tx = 0;
+		musb->int_rx = 0;
+	}
+
+	if (musb->int_tx || musb->int_rx || musb->int_usb)
+		ret = musb_interrupt(musb);
+
+	return ret;
+}
+
+static int pic32_musb_set_mode(struct musb *musb, u8 mode)
+{
+	struct device *dev = musb->controller;
+	struct pic32_musb_data *pdata = to_pic32_musb_data(dev);
+
+	switch (mode) {
+	case MUSB_HOST:
+		clrsetbits_le32(pdata->musb_glue + USBCRCON,
+				USBCRCON_USBIDVAL, USBCRCON_USBIDOVEN);
+		break;
+	case MUSB_PERIPHERAL:
+		setbits_le32(pdata->musb_glue + USBCRCON,
+			     USBCRCON_USBIDVAL | USBCRCON_USBIDOVEN);
+		break;
+	case MUSB_OTG:
+		dev_err(dev, "support for OTG is unimplemented\n");
+		break;
+	default:
+		dev_err(dev, "unsupported mode %d\n", mode);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int pic32_musb_init(struct musb *musb)
+{
+	struct pic32_musb_data *pdata = to_pic32_musb_data(musb->controller);
+	u32 ctrl, hwvers;
+	u8 power;
+
+	/* Returns zero if not clocked */
+	hwvers = musb_read_hwvers(musb->mregs);
+	if (!hwvers)
+		return -ENODEV;
+
+	/* Reset the musb */
+	power = musb_readb(musb->mregs, MUSB_POWER);
+	power = power | MUSB_POWER_RESET;
+	musb_writeb(musb->mregs, MUSB_POWER, power);
+	mdelay(100);
+
+	/* Start the on-chip PHY and its PLL. */
+	power = power & ~MUSB_POWER_RESET;
+	musb_writeb(musb->mregs, MUSB_POWER, power);
+
+	musb->isr = pic32_interrupt;
+
+	ctrl =  USBCRCON_USBIF | USBCRCON_USBRF |
+		USBCRCON_USBWK | USBCRCON_USBIDOVEN |
+		USBCRCON_PHYIDEN | USBCRCON_USBIE |
+		USBCRCON_USBRIE | USBCRCON_USBWKUPEN |
+		USBCRCON_VBUSMONEN;
+	writel(ctrl, pdata->musb_glue + USBCRCON);
+
+	return 0;
+}
+
+/* PIC32 supports only 32bit read operation */
+void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
+{
+	void __iomem *fifo = hw_ep->fifo;
+	u32 val, rem = len % 4;
+
+	/* USB stack ensures dst is always 32bit aligned. */
+	readsl(fifo, dst, len / 4);
+	if (rem) {
+		dst += len & ~0x03;
+		val = musb_readl(fifo, 0);
+		memcpy(dst, &val, rem);
+	}
+}
+
+const struct musb_platform_ops pic32_musb_ops = {
+	.init		= pic32_musb_init,
+	.set_mode	= pic32_musb_set_mode,
+	.disable	= pic32_musb_disable,
+	.enable		= pic32_musb_enable,
+};
+
+/* PIC32 default FIFO config - fits in 8KB */
+static struct musb_fifo_cfg pic32_musb_fifo_config[] = {
+	{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
+	{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
+	{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
+};
+
+static struct musb_hdrc_config pic32_musb_config = {
+	.fifo_cfg	= pic32_musb_fifo_config,
+	.fifo_cfg_size	= ARRAY_SIZE(pic32_musb_fifo_config),
+	.multipoint     = 1,
+	.dyn_fifo       = 1,
+	.num_eps        = 8,
+	.ram_bits       = 11,
+};
+
+/* PIC32 has one MUSB controller which can be host or gadget */
+static struct musb_hdrc_platform_data pic32_musb_plat = {
+	.mode           = MUSB_HOST,
+	.config         = &pic32_musb_config,
+	.power          = 250,		/* 500mA */
+	.platform_ops	= &pic32_musb_ops,
+};
+
+static int musb_usb_probe(struct udevice *dev)
+{
+	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
+	struct pic32_musb_data *pdata = dev_get_priv(dev);
+	struct musb_host_data *mdata = &pdata->mdata;
+	struct fdt_resource mc, glue;
+	void *fdt = (void *)gd->fdt_blob;
+	int node = dev->of_offset;
+	void __iomem *mregs;
+	int ret;
+
+	priv->desc_before_addr = true;
+
+	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+				     "mc", &mc);
+	if (ret < 0) {
+		printf("pic32-musb: resource \"mc\" not found\n");
+		return ret;
+	}
+
+	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+				     "control", &glue);
+	if (ret < 0) {
+		printf("pic32-musb: resource \"control\" not found\n");
+		return ret;
+	}
+
+	mregs = ioremap(mc.start, fdt_resource_size(&mc));
+	pdata->musb_glue = ioremap(glue.start, fdt_resource_size(&glue));
+
+	/* init controller */
+#ifdef CONFIG_USB_MUSB_HOST
+	mdata->host = musb_init_controller(&pic32_musb_plat,
+					   &pdata->dev, mregs);
+	if (!mdata->host)
+		return -EIO;
+
+	ret = musb_lowlevel_init(mdata);
+#else
+	pic32_musb_plat.mode = MUSB_PERIPHERAL;
+	ret = musb_register(&pic32_musb_plat, &pdata->dev, mregs);
+#endif
+	if (ret == 0)
+		printf("PIC32 MUSB OTG\n");
+
+	return ret;
+}
+
+static int musb_usb_remove(struct udevice *dev)
+{
+	struct pic32_musb_data *pdata = dev_get_priv(dev);
+
+	musb_stop(pdata->mdata.host);
+
+	return 0;
+}
+
+static const struct udevice_id pic32_musb_ids[] = {
+	{ .compatible = "microchip,pic32mzda-usb" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_musb) = {
+	.name		= "pic32-musb",
+	.id		= UCLASS_USB,
+	.of_match	= pic32_musb_ids,
+	.probe		= musb_usb_probe,
+	.remove		= musb_usb_remove,
+#ifdef CONFIG_USB_MUSB_HOST
+	.ops		= &musb_usb_ops,
+#endif
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct pic32_musb_data),
+};
-- 
1.8.3.1

[U-Boot] [PATCH v5 4/4] board: pic32mzda: enable USB-host, USB-storage support.

[Purna Chandra Mandal]

Enable MUSB host and USB storage support for Microchip
PIC32MZ[DA] Starter Kit.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

Changes in v5: None
Changes in v4:
- dts: add USB clock to musb node
- add missing CONFIG_PIC32_USB in defconfig

Changes in v3:
- add arch specific reads{bwlq}, writes{bwlq} in respective arch io.h
- remove reads{bwlq}, writes{bwlq} in musb-new driver

Changes in v2:
- compilation fix in drivers/usb/musb-new/linux-compat.h seperated
- compilation fix in drivers/gadget/f_mass_storage.c seperated

 arch/mips/dts/pic32mzda.dtsi   | 12 ++++++++++++
 arch/mips/dts/pic32mzda_sk.dts |  4 ++++
 configs/pic32mzdask_defconfig  |  6 ++++++
 include/configs/pic32mzdask.h  |  7 +++++++
 4 files changed, 29 insertions(+)

diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi
index 7d180d9..8a554f9 100644
--- a/arch/mips/dts/pic32mzda.dtsi
+++ b/arch/mips/dts/pic32mzda.dtsi
@@ -171,4 +171,16 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
+
+	usb: musb at 1f8e3000 {
+		compatible = "microchip,pic32mzda-usb";
+		reg = <0x1f8e3000 0x1000>,
+		      <0x1f884000 0x1000>;
+		reg-names = "mc", "control";
+		interrupts = <132 IRQ_TYPE_EDGE_RISING>,
+			     <133 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock PB5CLK>;
+		clock-names = "usb_clk";
+		status = "disabled";
+	};
 };
diff --git a/arch/mips/dts/pic32mzda_sk.dts b/arch/mips/dts/pic32mzda_sk.dts
index e5ce0bd..0a7847e 100644
--- a/arch/mips/dts/pic32mzda_sk.dts
+++ b/arch/mips/dts/pic32mzda_sk.dts
@@ -52,4 +52,8 @@
 	ethernet_phy: lan8740_phy at 0 {
 		reg = <0>;
 	};
+};
+
+&usb {
+	status = "okay";
 };
\ No newline at end of file
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index 4017983..eba6cd5 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -14,6 +14,7 @@ CONFIG_LOOPW=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_RARP=y
@@ -30,5 +31,10 @@ CONFIG_PIC32_ETH=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
 CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_PIC32=y
+CONFIG_USB_STORAGE=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 3ea1194..78faaec 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -105,6 +105,12 @@
 #define CONFIG_GENERIC_MMC
 #define CONFIG_CMD_MMC
 
+/*--------------------------------------------------
+ * USB Configuration
+ */
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
 /*-----------------------------------------------------------------------
  * File System Configuration
  */
@@ -153,6 +159,7 @@
 
 #define BOOT_TARGET_DEVICES(func)	\
 	func(MMC, mmc, 0)		\
+	func(USB, usb, 0)		\
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
-- 
1.8.3.1

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Marek Vasut]

On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
> but not the writes[bwql], reads[bwql] needed by some drivers.
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Applied all four to u-boot-usb/master, thanks!

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Purna Chandra Mandal]

On 03/21/2016 04:49 PM, Marek Vasut wrote:

> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>
>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> Applied all four to u-boot-usb/master, thanks!
>
Thanks. :)

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Marek Vasut]

On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
> On 03/21/2016 04:49 PM, Marek Vasut wrote:
> 
>> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>
>>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>> Applied all four to u-boot-usb/master, thanks!
>>
> Thanks. :)
> 
Thank you for persevering ;-)

btw. have you worked with Olimex PIC32-EMZ64 (PIC32MZ2048EFH064) ?
Can it be used for testing U-Boot on PIC32 and this musb stuff ?

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Purna Chandra Mandal]

On 03/21/2016 05:09 PM, Marek Vasut wrote:
> On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
>> On 03/21/2016 04:49 PM, Marek Vasut wrote:
>>
>>> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>>
>>>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>>> Applied all four to u-boot-usb/master, thanks!
>>>
>> Thanks. :)
>>
> Thank you for persevering ;-)
>
> btw. have you worked with Olimex PIC32-EMZ64 (PIC32MZ2048EFH064) ?
> Can it be used for testing U-Boot on PIC32 and this musb stuff ?

Not exactly 'PIC32MZ2048EFH064' but on some other board having
PIC32MZ2048EFM144 (with additional SRAM connected on EBI).
Anyway MUSB stuff is same. And pin-mapping will be different
so need to update pinctrl. Otherwise it should be fine for U-Boot
testing.

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Marek Vasut]

On 03/21/2016 12:44 PM, Purna Chandra Mandal wrote:
> On 03/21/2016 05:09 PM, Marek Vasut wrote:
>> On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
>>> On 03/21/2016 04:49 PM, Marek Vasut wrote:
>>>
>>>> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>>>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>>>
>>>>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>>>> Applied all four to u-boot-usb/master, thanks!
>>>>
>>> Thanks. :)
>>>
>> Thank you for persevering ;-)
>>
>> btw. have you worked with Olimex PIC32-EMZ64 (PIC32MZ2048EFH064) ?
>> Can it be used for testing U-Boot on PIC32 and this musb stuff ?
> 
> Not exactly 'PIC32MZ2048EFH064' but on some other board having
> PIC32MZ2048EFM144 (with additional SRAM connected on EBI).
> Anyway MUSB stuff is same. And pin-mapping will be different
> so need to update pinctrl. Otherwise it should be fine for U-Boot
> testing.

I see, thanks!


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Daniel Schwierzeck]

Hi,

Am 21.03.2016 um 08:35 schrieb Purna Chandra Mandal:
> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
> but not the writes[bwql], reads[bwql] needed by some drivers.
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---

sorry for noticing this so late, but this patch is assigned to me in
patchwork. I think this patch [1] as well as [2] should be merged via
Albert's u-boot-arm tree, shouldn't it?

[1] http://patchwork.ozlabs.org/patch/599979/
[2] http://patchwork.ozlabs.org/patch/599980/

> 
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/include/asm/io.h | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
> index 75773bd..9d185a6 100644
> --- a/arch/arm/include/asm/io.h
> +++ b/arch/arm/include/asm/io.h
> @@ -284,6 +284,13 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
>  #define insw_p(port,to,len)		insw(port,to,len)
>  #define insl_p(port,to,len)		insl(port,to,len)
>  
> +#define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
> +#define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
> +#define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
> +#define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
> +#define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
> +#define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
> +
>  /*
>   * ioremap and friends.
>   *
> 

-- 
- Daniel

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[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Marek Vasut]

On 04/10/2016 07:03 PM, Daniel Schwierzeck wrote:
> Hi,
> 
> Am 21.03.2016 um 08:35 schrieb Purna Chandra Mandal:
>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>
>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>> ---
> 
> sorry for noticing this so late, but this patch is assigned to me in
> patchwork. I think this patch [1] as well as [2] should be merged via
> Albert's u-boot-arm tree, shouldn't it?
> 
> [1] http://patchwork.ozlabs.org/patch/599979/
> [2] http://patchwork.ozlabs.org/patch/599980/

Since this is part of usb series, I will pick it via u-boot-usb and send
PR shortly.

Best regards,
Marek Vasut

[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Daniel Schwierzeck]

Am 10.04.2016 um 19:18 schrieb Marek Vasut:
> On 04/10/2016 07:03 PM, Daniel Schwierzeck wrote:
>> Hi,
>>
>> Am 21.03.2016 um 08:35 schrieb Purna Chandra Mandal:
>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>
>>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>>> ---
>>
>> sorry for noticing this so late, but this patch is assigned to me in
>> patchwork. I think this patch [1] as well as [2] should be merged via
>> Albert's u-boot-arm tree, shouldn't it?
>>
>> [1] http://patchwork.ozlabs.org/patch/599979/
>> [2] http://patchwork.ozlabs.org/patch/599980/
> 
> Since this is part of usb series, I will pick it via u-boot-usb and send
> PR shortly.
> 

ok, can I reassign all four patches to you?

-- 
- Daniel

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[U-Boot] [PATCH v5 1/4] arm: add missing writes[bwql], reads[bwql].

[Marek Vasut]

On 04/10/2016 07:26 PM, Daniel Schwierzeck wrote:
> 
> 
> Am 10.04.2016 um 19:18 schrieb Marek Vasut:
>> On 04/10/2016 07:03 PM, Daniel Schwierzeck wrote:
>>> Hi,
>>>
>>> Am 21.03.2016 um 08:35 schrieb Purna Chandra Mandal:
>>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>>
>>>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>>>> ---
>>>
>>> sorry for noticing this so late, but this patch is assigned to me in
>>> patchwork. I think this patch [1] as well as [2] should be merged via
>>> Albert's u-boot-arm tree, shouldn't it?
>>>
>>> [1] http://patchwork.ozlabs.org/patch/599979/
>>> [2] http://patchwork.ozlabs.org/patch/599980/
>>
>> Since this is part of usb series, I will pick it via u-boot-usb and send
>> PR shortly.
>>
> 
> ok, can I reassign all four patches to you?
> 
Sure, and mark them as applied while at it ;-)

-- 
Best regards,
Marek Vasut