* [U-Boot] [PATCH v2] arm: socfpga: migration of CONFIG_SPI_FLASH_BAR
@ 2016-03-24 8:45 Denis Bakhvalov
2016-03-24 16:43 ` Marek Vasut
0 siblings, 1 reply; 2+ messages in thread
From: Denis Bakhvalov @ 2016-03-24 8:45 UTC (permalink / raw)
To: u-boot
CONFIG_SPI_FLASH_BAR was deleted from socfpga_common.h
and placed in socfpga_*_defconfig where it makes sense.
Signed-off-by: Denis Bakhvalov <dendibakh@gmail.com>
Reported-by: Denis Bakhvalov <dendibakh@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
---
Changes for v2:
- Diff was generated from u-boot-socfpga
configs/socfpga_arria5_defconfig | 1 +
configs/socfpga_cyclone5_defconfig | 1 +
configs/socfpga_de0_nano_soc_defconfig | 1 +
configs/socfpga_mcvevk_defconfig | 1 +
configs/socfpga_sockit_defconfig | 1 +
configs/socfpga_socrates_defconfig | 1 +
configs/socfpga_sr1500_defconfig | 1 +
include/configs/socfpga_common.h | 2 --
8 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 7b60d95..505a68d 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 6a487f4..df19a95 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index cfcae5d..bb37825 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index b6f6a65..8a76aa1 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index f45c3ed..36bb1e1 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index e25d09b..937f14f 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -23,5 +23,6 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index d499a14..83eada3 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -17,6 +17,7 @@ CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 56d32e6..2ad0287 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -93,7 +93,6 @@
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED 30000000
-#define CONFIG_SPI_FLASH_BAR
/*
* The base address is configurable in QSys, each board must specify the
* base address based on it's particular FPGA configuration. Please note
@@ -219,7 +218,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#endif
#define CONFIG_CQSPI_DECODER 0
#define CONFIG_CMD_SF
-#define CONFIG_SPI_FLASH_BAR
/*
* Designware SPI support
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: migration of CONFIG_SPI_FLASH_BAR
2016-03-24 8:45 [U-Boot] [PATCH v2] arm: socfpga: migration of CONFIG_SPI_FLASH_BAR Denis Bakhvalov
@ 2016-03-24 16:43 ` Marek Vasut
0 siblings, 0 replies; 2+ messages in thread
From: Marek Vasut @ 2016-03-24 16:43 UTC (permalink / raw)
To: u-boot
On 03/24/2016 09:45 AM, Denis Bakhvalov wrote:
> CONFIG_SPI_FLASH_BAR was deleted from socfpga_common.h
> and placed in socfpga_*_defconfig where it makes sense.
When I read the commit message and I pretend to have no experience with
socfpga, the following question comes to mind:
And why exactly does it make sense in configs/socfpga_* and not in
include/configs/socfpga_common.h ?
The commit message should answer this. (sorry for torturing you here,
hope you don't mind)
> Signed-off-by: Denis Bakhvalov <dendibakh@gmail.com>
> Reported-by: Denis Bakhvalov <dendibakh@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> Acked-by: Marek Vasut <marex@denx.de>
> ---
> Changes for v2:
> - Diff was generated from u-boot-socfpga
Thanks. Can you fix the commit message and do a V3 so I can apply it?
Also, thanks for using the git send-email :)
> configs/socfpga_arria5_defconfig | 1 +
> configs/socfpga_cyclone5_defconfig | 1 +
> configs/socfpga_de0_nano_soc_defconfig | 1 +
> configs/socfpga_mcvevk_defconfig | 1 +
> configs/socfpga_sockit_defconfig | 1 +
> configs/socfpga_socrates_defconfig | 1 +
> configs/socfpga_sr1500_defconfig | 1 +
> include/configs/socfpga_common.h | 2 --
> 8 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
> index 7b60d95..505a68d 100644
> --- a/configs/socfpga_arria5_defconfig
> +++ b/configs/socfpga_arria5_defconfig
> @@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_DM_ETH=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
> index 6a487f4..df19a95 100644
> --- a/configs/socfpga_cyclone5_defconfig
> +++ b/configs/socfpga_cyclone5_defconfig
> @@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_DM_ETH=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
> index cfcae5d..bb37825 100644
> --- a/configs/socfpga_de0_nano_soc_defconfig
> +++ b/configs/socfpga_de0_nano_soc_defconfig
> @@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> CONFIG_CADENCE_QSPI=y
> CONFIG_DESIGNWARE_SPI=y
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
> index b6f6a65..8a76aa1 100644
> --- a/configs/socfpga_mcvevk_defconfig
> +++ b/configs/socfpga_mcvevk_defconfig
> @@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> CONFIG_CADENCE_QSPI=y
> CONFIG_DESIGNWARE_SPI=y
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
> index f45c3ed..36bb1e1 100644
> --- a/configs/socfpga_sockit_defconfig
> +++ b/configs/socfpga_sockit_defconfig
> @@ -19,6 +19,7 @@ CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_DM_ETH=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
> index e25d09b..937f14f 100644
> --- a/configs/socfpga_socrates_defconfig
> +++ b/configs/socfpga_socrates_defconfig
> @@ -23,5 +23,6 @@ CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> CONFIG_CADENCE_QSPI=y
> CONFIG_DESIGNWARE_SPI=y
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
> index d499a14..83eada3 100644
> --- a/configs/socfpga_sr1500_defconfig
> +++ b/configs/socfpga_sr1500_defconfig
> @@ -17,6 +17,7 @@ CONFIG_DM_MMC=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> +CONFIG_SPI_FLASH_BAR=y
> CONFIG_DM_ETH=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_SYS_NS16550=y
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index 56d32e6..2ad0287 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -93,7 +93,6 @@
> #define CONFIG_CMD_SPI
> #define CONFIG_CMD_SF
> #define CONFIG_SF_DEFAULT_SPEED 30000000
> -#define CONFIG_SPI_FLASH_BAR
> /*
> * The base address is configurable in QSys, each board must specify the
> * base address based on it's particular FPGA configuration. Please note
> @@ -219,7 +218,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
> #endif
> #define CONFIG_CQSPI_DECODER 0
> #define CONFIG_CMD_SF
> -#define CONFIG_SPI_FLASH_BAR
>
> /*
> * Designware SPI support
>
--
Best regards,
Marek Vasut
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