[U-Boot] [PATCH v2] armv8: LS2080A: Consolidate LS2080A and LS2085A

York Sun
2016-03-29T15:33:07Z

On 03/29/2016 07:50 AM, Prabhakar Kushwaha wrote:
>
>> -----Original Message-----
>> From: York Sun [mailto:york.sun at nxp.com]
>> Sent: Tuesday, March 29, 2016 12:30 AM
>> To: U-Boot Mailing List <u-boot@lists.denx.de>
>> Cc: Stuart Yoder <stuart.yoder@nxp.com>; Scott Wood <oss@buserror.net>;
>> Huan Wang <alison.wang@nxp.com>; york sun <york.sun@nxp.com>;
>> Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>; Ramneek Mehresh
>> <ramneek.mehresh@freescale.com>; Pratiyush Mohan Srivastava
>> <pratiyush.srivastava@freescale.com>; Stuart Yoder
>> <stuart.yoder@freescale.com>; Li Yang <leoli@freescale.com>; Hou Zhiqiang
>> <B48286@freescale.com>; Shaohui Xie <Shaohui.Xie@freescale.com>;
>> Aneesh Bansal <aneesh.bansal@nxp.com>; Jaiprakash Singh
>> <b44839@freescale.com>; Mingkai Hu <Mingkai.Hu@freescale.com>;
>> Haiying Wang <Haiying.Wang@freescale.com>; Albert Aribaud
>> <albert.u.boot@aribaud.net>; Minghuan Lian
>> <Minghuan.Lian@freescale.com>; Alexander Graf <agraf@suse.de>; Lijun
>> Pan <Lijun.Pan@freescale.com>; Scott Wood <scottwood@freescale.com>;
>> Gong Qianyu <Qianyu.Gong@freescale.com>; Itai Katz <itai.katz@nxp.com>;
>> Joe Hershberger <joe.hershberger@ni.com>; Prabhakar Kushwaha
>> <prabhakar@freescale.com>; J. German Rivera
>> <German.Rivera@freescale.com>; Simon Glass <sjg@chromium.org>;
>> Shengzhou Liu <shengzhou.liu@nxp.com>; Bin Meng
>> <bmeng.cn@gmail.com>; Bhupesh Sharma
>> <bhupesh.sharma@freescale.com>; Qianyu Gong <qianyu.gong@nxp.com>;
>> Ashish Kumar <ashish.kumar@nxp.com>; Thomas Chou
>> <thomas@wytron.com.tw>; Tang Yuantian <Yuantian.Tang@freescale.com>;
>> Alison Wang <b18965@freescale.com>
>> Subject: [PATCH v2] armv8: LS2080A: Consolidate LS2080A and LS2085A
>>
>> LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA
>> DDR. The RDB and QDS boards support both personality. By detecting the
>> SVR at runtime, a single image per board can support both SoCs. It gives
>> users flexibility to swtich SoC without the need to reprogram the board.
>>
>> Signed-off-by: York Sun <york.sun@nxp.com>
>> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
>>
>> ---
>>
>> Changes in v2:
>> Add checking for SVR before starting AIOP Drop RFC from subject
>>
>> arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 ---
>> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 9 ++++---
>> .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 6 ++++-
>> arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 +-
>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 26
>> ++++++++++++++++++-
>> arch/arm/cpu/armv8/fsl-layerscape/spl.c | 4 +--
>> arch/arm/include/asm/arch-fsl-layerscape/config.h | 9 ++-----
>> arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 +-
>> .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 +-
>> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++
>> board/freescale/ls2080a/ddr.c | 27 +++++++++++---------
>> board/freescale/ls2080a/ls2080a.c | 2 +-
>> board/freescale/ls2080aqds/MAINTAINERS | 2 --
>> board/freescale/ls2080aqds/ddr.c | 27 +++++++++++---------
>> board/freescale/ls2080aqds/ls2080aqds.c | 2 +-
>> board/freescale/ls2080ardb/MAINTAINERS | 2 --
>> board/freescale/ls2080ardb/ddr.c | 27 +++++++++++---------
>> board/freescale/ls2080ardb/ls2080ardb.c | 2 +-
>> configs/ls2085aqds_defconfig | 19 --------------
>> configs/ls2085aqds_nand_defconfig | 14 ----------
>> configs/ls2085ardb_defconfig | 19 --------------
>> configs/ls2085ardb_nand_defconfig | 14 ----------
>> drivers/net/fsl-mc/mc.c | 4 +++
>> drivers/net/ldpaa_eth/Makefile | 1 -
>> include/configs/ls2080a_common.h | 7 +----
>> include/configs/ls2080a_emu.h | 7 -----
>> include/configs/ls2080a_simu.h | 7 -----
>> include/linux/usb/xhci-fsl.h | 2 +-
>> 28 files changed, 100 insertions(+), 152 deletions(-) delete mode 100644
>> configs/ls2085aqds_defconfig delete mode 100644
>> configs/ls2085aqds_nand_defconfig delete mode 100644
>> configs/ls2085ardb_defconfig delete mode 100644
>> configs/ls2085ardb_nand_defconfig
>>
>
> <snip>
>
>
>> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index
>> f83bd0c..98b1636 100644
>> --- a/drivers/net/fsl-mc/mc.c
>> +++ b/drivers/net/fsl-mc/mc.c
>> @@ -363,6 +363,9 @@ static int load_mc_aiop_img(u64 aiop_fw_addr)
>> void *aiop_img;
>> #endif
>>
>> + /* Check if AIOP is available */
>> + if (!soc_has_aiop)
>> + return -ENODEV;

It should be soc_has_aiop(). Will fix and test on board.

>> /*
>> * Load the MC AIOP image in the MC private DRAM block:
>> */
>> @@ -1235,6 +1238,7 @@ static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int
>> argc, char * const argv[])
>> aiop_fw_addr = simple_strtoull(argv[3],
>> NULL,
>> 16);
>>
>> + /* if SoC doesn't have AIOP, err = -ENODEV
>> */
>> err = load_mc_aiop_img(aiop_fw_addr);
>> if (!err)
>> printf("fsl-mc: AIOP FW applied\n");
>
>
> I am not seeing any svr check. Are we expecting load_mc_aiop_img to return -ENODEV.
> This patch does not contain modification in load_mc_aiop_img for SVR check.
>

See above.

York