* [U-Boot] [PATCH] armv8/ls1043aqds: dts: set SPI mode for DSPI
@ 2016-03-23 11:11 Gong Qianyu
2016-03-29 16:02 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Gong Qianyu @ 2016-03-23 11:11 UTC (permalink / raw)
To: u-boot
It's necessary to set the clock phase and polarity for DSPI
flash or it could not work properly.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
---
arch/arm/dts/fsl-ls1043a-qds.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi
index 66efe67..2e9f1f9 100644
--- a/arch/arm/dts/fsl-ls1043a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi
@@ -28,8 +28,10 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
- reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
+ spi-cpol;
+ spi-cpha;
+ reg = <0>;
};
dflash1: sst25wf040b {
@@ -37,6 +39,8 @@
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3500000>;
+ spi-cpol;
+ spi-cpha;
reg = <1>;
};
@@ -45,6 +49,8 @@
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3500000>;
+ spi-cpol;
+ spi-cpha;
reg = <2>;
};
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] armv8/ls1043aqds: dts: set SPI mode for DSPI
2016-03-23 11:11 [U-Boot] [PATCH] armv8/ls1043aqds: dts: set SPI mode for DSPI Gong Qianyu
@ 2016-03-29 16:02 ` York Sun
0 siblings, 0 replies; 2+ messages in thread
From: York Sun @ 2016-03-29 16:02 UTC (permalink / raw)
To: u-boot
On 03/23/2016 04:21 AM, Gong Qianyu wrote:
> It's necessary to set the clock phase and polarity for DSPI
> flash or it could not work properly.
>
> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
> ---
> arch/arm/dts/fsl-ls1043a-qds.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
Minor change to commit message.
Applied to u-boot-fsl-qoriq master. Awaiting upstream.
Thanks.
York
^ permalink raw reply [flat|nested] 2+ messages in thread
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