From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] Newbie SPL question for socfpga_sockit
Date: Tue, 29 Mar 2016 19:45:55 +0200 [thread overview]
Message-ID: <56FABF53.1000705@denx.de> (raw)
In-Reply-To: <CAMcKmiG25h2ET-ajqkYmoGbHZqjSxuF9VV5oqoB4CP7ZZYU+sw@mail.gmail.com>
On 03/29/2016 03:44 AM, George Broz wrote:
> On 20 March 2016 at 08:55, Dinh Nguyen <dinguyen@opensource.altera.com> wrote:
>>
>>
>> On 03/16/2016 08:35 PM, Marek Vasut wrote:
>>>>
>>>> Does this work for anybody else?
>>>> Is it in anyone's experience that these (cheaper) Terasic
>>>> eval boards are generally out of spec?
>>>>
>>>> Is there a way to relax the calibration parameters? the USB parameters?
>>>>
>>>> Would it help if I posted debug output?
>>>
>>> Sorry for the late reply, I am horribly overloaded now. I asked someone
>>> in #u-boot who has the DE0-NANO-SOC board to test latest u-boot/master
>>> on it and it apparently worked for him. I should get some more feedback
>>> in the morning [ see http://pastebin.com/CM1QJGnh ] .
>>>
>>> Still, this is getting real creepy. You are the second person who is
>>> complaining about misbehavior of terasic boards with mainline u-boot
>>> and whatever I do, I cannot replicate this.
>>>
>>> I am at least CCing the Altera guys. Sorry I have no better suggestion
>>> for you :(
>>
>> I don't have any problems with mainline U-Boot and SPL on my DE0-NANO-BOARD:
>>
>> U-Boot SPL 2016.03-00307-ge4fb863 (Mar 20 2016 - 10:37:13)
>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
>> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
>> drivers/ddr/altera/sequencer.c: Calibration complete
>> Trying to boot from MMC
>>
>>
>> U-Boot 2016.03-00307-ge4fb863 (Mar 20 2016 - 10:37:13 -0500)
>>
>> CPU: Altera SoCFPGA Platform
>> FPGA: Altera Cyclone V, SE/A4 or SX/C4, version 0x0
>> BOOT: SD/MMC Internal Transceiver (3.0V)
>> Watchdog enabled
>> I2C: ready
>> DRAM: 1 GiB
>> MMC: dwmmc0 at ff704000: 0
>> In: serial
>> Out: serial
>> Err: serial
>> Model: Terasic DE0-Nano(Atlas)
>> Net: eth0: ethernet at ff702000
>> Hit any key to stop autoboot: 0
>> =>
>>
>> Sorry, I know that doesn't help. So let's walk through my workflow. I am
>> not using any Altera tools when I build.
>>
>> $make socfpga_de0_nano_soc_defconfig
>> $make u-boot-with-spl.sfp
>> $dd if=u-boot-with-spl.sfp of=/dev/sdb3
>>
>> My gcc is: arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-12ubuntu1) 4.7.3
>>
>> Has the board ever worked for you at all? Can you try this image:
>>
>> https://rocketboards.org/foswiki/view/Documentation/AtlasSoCSdCardImage
>>
>> Dinh
>>
>>
>
> Hi All,
>
> Was away...sorry... back again.
>
> Dinh - my workflow is exactly as yours is above.
>
> I've used several toolchains - always the same result.
>
> The first de0_nano_soc board I bought has no problem booting from the
> factory supplied image:
>
> SPL: U-Boot SPL 2013.01.01 (Dec 29 2014 - 15:29:15)
> Image: U-Boot 2013.01.01 (Dec 30 2014 - 12:07:34)
>
> and it even works with some USB sticks.
>
> But if I build a new SPL/image with workflow above using v2016.03
>
> (git clone git://git.denx.de/u-boot.git u-boot/ or git clone
> http://git.denx.de/u-boot.git u-boot/)
>
> then I get the intermittent failing memory calibration and no USB
> (dwc_otg_core_host_init: Timeout!...)
>
> On my sockit board the memory calibration fails every time.
Are you willing to debug this stuff ? I have an idea how to do
comparative debugging if you have time to spare.
> So I ordered and received a _second_ de0_nano_soc board.
>
> The same SPL/image that was intermittently failing on the first board
> works on the second board. I have not seen it fail after 20 reboots.
>
> Unfortunately, USB behaves the same (dwc_otg_core_host_init: Timeout!...)
>
> Not sure what that means... marginal boards from Terasic? Calibration
> tests/parameters too stringent?
Code being slightly different than what Altera ships ... ;-)
> --George
>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-03-29 17:45 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-17 21:54 [U-Boot] Newbie SPL question for socfpga_sockit George Broz
2016-02-18 2:45 ` Phil Reid
2016-03-02 2:40 ` George Broz
2016-03-02 3:49 ` Phil Reid
2016-03-03 6:49 ` George Broz
2016-03-03 7:11 ` Phil Reid
2016-03-03 14:57 ` George Broz
2016-03-09 1:42 ` Phil Reid
2016-03-09 10:55 ` Marek Vasut
2016-03-09 16:06 ` George Broz
2016-03-16 1:29 ` George Broz
2016-03-16 16:17 ` George Broz
2016-03-17 1:35 ` Marek Vasut
2016-03-18 18:59 ` George Broz
2016-03-18 19:32 ` Marek Vasut
2016-03-18 21:22 ` George Broz
2016-03-19 11:10 ` Phil Reid
2016-03-20 16:44 ` Marek Vasut
2016-03-20 16:49 ` Marek Vasut
2016-03-29 1:56 ` George Broz
2016-03-29 17:46 ` Marek Vasut
2016-03-20 15:55 ` Dinh Nguyen
2016-03-20 16:42 ` Marek Vasut
2016-03-22 17:06 ` Dinh Nguyen
2016-03-26 20:52 ` Marek Vasut
2016-04-05 8:33 ` Phil Reid
2016-04-05 22:03 ` Marek Vasut
2016-04-06 0:31 ` George Broz
2016-04-06 0:45 ` Marek Vasut
2016-04-06 1:17 ` George Broz
2016-04-06 10:43 ` Marek Vasut
2016-04-07 1:42 ` George Broz
2016-04-07 2:05 ` Marek Vasut
2016-04-07 13:14 ` George Broz
2016-04-07 20:39 ` Marek Vasut
2016-04-07 23:31 ` George Broz
2016-04-07 23:36 ` Marek Vasut
2016-04-07 23:51 ` George Broz
2016-04-08 5:16 ` Stefan Roese
2016-04-08 12:36 ` Marek Vasut
2016-04-08 22:40 ` George Broz
2016-04-10 17:47 ` Marek Vasut
2016-04-11 2:03 ` George Broz
2016-04-11 14:02 ` Marek Vasut
2016-04-12 15:53 ` Dinh Nguyen
2016-04-12 16:00 ` Marek Vasut
2016-04-12 16:08 ` Dinh Nguyen
2016-04-12 16:11 ` Marek Vasut
2016-04-13 9:25 ` Chin Liang See
2016-04-12 16:09 ` Stefan Roese
2016-04-13 11:09 ` Marek Vasut
2016-04-06 7:00 ` Phil Reid
2016-04-06 11:51 ` Marek Vasut
2016-04-06 15:04 ` Phil Reid
2016-04-06 20:38 ` Marek Vasut
2016-03-29 1:44 ` George Broz
2016-03-29 17:45 ` Marek Vasut [this message]
2016-03-03 21:16 ` George Broz
2016-03-02 22:54 ` Dinh Nguyen
2016-03-02 23:04 ` Marek Vasut
2016-03-02 23:08 ` Dinh Nguyen
2016-03-02 23:24 ` Marek Vasut
2016-03-03 14:48 ` Dinh Nguyen
2016-03-03 14:51 ` Marek Vasut
2016-03-03 22:00 ` George Broz
2016-03-03 22:09 ` Marek Vasut
[not found] ` <CAMcKmiG8OMmbZ262n8gL7eM=WAgaakaZ5rWzCC1vYu7yzGBYAA@mail.gmail.com>
[not found] ` <56D8BDD7.8070604@denx.de>
[not found] ` <CAMcKmiGrZ94sZKY85Y3aC1_fwgV8oJeAJ0O71bY=gMxUGBp=FQ@mail.gmail.com>
[not found] ` <56D8C3A0.9020204@denx.de>
2016-03-03 23:46 ` George Broz
2016-03-04 16:52 ` Dinh Nguyen
2016-03-04 16:06 ` Dinh Nguyen
2016-03-04 19:03 ` Marek Vasut
2016-03-21 14:05 ` Chin Liang See
2016-03-21 15:45 ` Chin Liang See
2016-03-23 15:00 ` Chin Liang See
2016-03-23 15:37 ` [U-Boot] SoCFPGA cache / S-bit problem - was " Stefan Roese
2016-04-06 16:35 ` Dinh Nguyen
2016-04-06 16:46 ` Marek Vasut
2016-04-06 16:51 ` Dinh Nguyen
2016-03-03 6:55 ` [U-Boot] " George Broz
2016-03-03 9:48 ` Marek Vasut
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