[U-Boot] [uboot] [PATCH 1/2] net: phy: dp83867: Add device tree bindings and documentation

[U-Boot] [uboot] [PATCH 1/2] net: phy: dp83867: Add device tree bindings and documentation

[Dan Murphy]

Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.

The original document was from:
    [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]

Signed-off-by: Dan Murphy <dmurphy@ti.com>
---

RFC->v1 - Separated out bindings to a different patch and added the bindings
documentation - https://patchwork.ozlabs.org/patch/604113/

 doc/device-tree-bindings/net/ti,dp83867.txt | 28 +++++++++++++++++++++++
 include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
 2 files changed, 63 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
 create mode 100644 include/dt-bindings/net/ti-dp83867.h

diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
new file mode 100644
index 0000000..2516b45
--- /dev/null
+++ b/doc/device-tree-bindings/net/ti,dp83867.txt
@@ -0,0 +1,28 @@
+* Texas Instruments - dp83867 Giga bit ethernet phy
+
+Required properties:
+	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
+		for applicable values
+
+Default child nodes are standard Ethernet PHY device
+nodes as described in doc/devicetree/bindings/net/ethernet.txt
+
+Example:
+
+&mac {
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+	status = "okay";
+
+	ti,rx_int_delay = <DP83867_RGMIIDCTL_1_50_NS>;
+	ti,tx_int_delay = <DP83867_RGMIIDCTL_2_50_NS>;
+	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+
+};
+
+Datasheet can be found:
+http://www.ti.com/product/DP83867IR/datasheet
diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h
new file mode 100644
index 0000000..5c592fb
--- /dev/null
+++ b/include/dt-bindings/net/ti-dp83867.h
@@ -0,0 +1,35 @@
+/*
+ * TI DP83867 PHY drivers
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ *
+ */
+
+#ifndef _DT_BINDINGS_TI_DP83867_H
+#define _DT_BINDINGS_TI_DP83867_H
+
+/* PHY CTRL bits */
+#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
+#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
+#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
+#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
+
+/* RGMIIDCTL internal delay for rx and tx */
+#define	DP83867_RGMIIDCTL_250_PS	0x0
+#define	DP83867_RGMIIDCTL_500_PS	0x1
+#define	DP83867_RGMIIDCTL_750_PS	0x2
+#define	DP83867_RGMIIDCTL_1_NS		0x3
+#define	DP83867_RGMIIDCTL_1_25_NS	0x4
+#define	DP83867_RGMIIDCTL_1_50_NS	0x5
+#define	DP83867_RGMIIDCTL_1_75_NS	0x6
+#define	DP83867_RGMIIDCTL_2_00_NS	0x7
+#define	DP83867_RGMIIDCTL_2_25_NS	0x8
+#define	DP83867_RGMIIDCTL_2_50_NS	0x9
+#define	DP83867_RGMIIDCTL_2_75_NS	0xa
+#define	DP83867_RGMIIDCTL_3_00_NS	0xb
+#define	DP83867_RGMIIDCTL_3_25_NS	0xc
+#define	DP83867_RGMIIDCTL_3_50_NS	0xd
+#define	DP83867_RGMIIDCTL_3_75_NS	0xe
+#define	DP83867_RGMIIDCTL_4_00_NS	0xf
+
+#endif
-- 
2.8.0.rc3

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Dan Murphy]

Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree.  If the value is not set in the
devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the
driver.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index c3912d5..e91a6ed 100644
--- a/drivers/net/phy/ti.c
+++ b/drivers/net/phy/ti.c
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f
@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus
@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+
+	dp83867->fifo_depth = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,fifo_depth", DEFAULT_FIFO_DEPTH);
+
+	return 0;
+}
+#else
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY;
+	dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY;
+	dp83867->fifo_depth = DEFAULT_FIFO_DEPTH;
+
+	return 0;
+}
+#endif
 
 static int dp83867_config(struct phy_device *phydev)
 {
+	struct dp83867_private *dp83867;
 	unsigned int val, delay;
 	int ret;
 
+	if (!phydev->priv) {
+		dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL);
+		if (!dp83867)
+			return -ENOMEM;
+
+		phydev->priv = dp83867;
+		ret = dp83867_of_init(phydev);
+		if (ret)
+			goto err_out;
+	} else {
+		dp83867 = (struct dp83867_private *)phydev->priv;
+	}
+
 	/* Restart the PHY.  */
 	val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);
 	phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL,
@@ -152,9 +213,9 @@ static int dp83867_config(struct phy_device *phydev)
 	if (phy_interface_is_rgmii(phydev)) {
 		ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
 			(DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) |
-			(FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
+			(dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
 		if (ret)
-			return ret;
+			goto err_out;
 	}
 
 	if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) &&
@@ -175,8 +236,8 @@ static int dp83867_config(struct phy_device *phydev)
 		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,
 				       DP83867_DEVADDR, phydev->addr, val);
 
-		delay = (RX_ID_DELAY |
-			 (TX_ID_DELAY << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
+		delay = (dp83867->rx_id_delay |
+			 (dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
 
 		phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
 				       DP83867_DEVADDR, phydev->addr, delay);
@@ -184,6 +245,10 @@ static int dp83867_config(struct phy_device *phydev)
 
 	genphy_config_aneg(phydev);
 	return 0;
+
+err_out:
+	kfree(dp83867);
+	return ret;
 }
 
 static struct phy_driver DP83867_driver = {
-- 
2.8.0.rc3

[U-Boot] [uboot] [PATCH 1/2] net: phy: dp83867: Add device tree bindings and documentation

[Tom Rini]

On Tue, Apr 05, 2016 at 10:05:21AM -0500, Dan Murphy wrote:

> Add the device tree bindings and the accompanying documentation
> for the TI DP83867 Giga bit ethernet phy driver.
> 
> The original document was from:
>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20160405/4b2ea3e9/attachment.sig>

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Tom Rini]

On Tue, Apr 05, 2016 at 10:05:22AM -0500, Dan Murphy wrote:

> Not all devices use the same internal delay or fifo depth.
> Add the ability to set the internal delay for rx or tx and the
> fifo depth via the devicetree.  If the value is not set in the
> devicetree then set the delay to the default.
> 
> If devicetree is not used then use the default defines within the
> driver.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20160405/6f33bba1/attachment.sig>

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Michal Simek]

On 5.4.2016 17:05, Dan Murphy wrote:
> Not all devices use the same internal delay or fifo depth.
> Add the ability to set the internal delay for rx or tx and the
> fifo depth via the devicetree.  If the value is not set in the
> devicetree then set the delay to the default.
> 
> If devicetree is not used then use the default defines within the
> driver.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> 
> RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/
> 
>  drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 73 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
> index c3912d5..e91a6ed 100644
> --- a/drivers/net/phy/ti.c
> +++ b/drivers/net/phy/ti.c
> @@ -6,6 +6,14 @@
>   */
>  #include <common.h>
>  #include <phy.h>
> +#include <linux/compat.h>
> +#include <malloc.h>
> +
> +#include <fdtdec.h>
> +#include <dm.h>
> +#include <dt-bindings/net/ti-dp83867.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
>  
>  /* TI DP83867 */
>  #define DP83867_DEVADDR		0x1f
> @@ -57,6 +65,17 @@
>  #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
>  #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
>  
> +/* User setting - can be taken from DTS */
> +#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
> +#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
> +#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
> +
> +struct dp83867_private {
> +	int rx_id_delay;
> +	int tx_id_delay;
> +	int fifo_depth;
> +};
> +
>  /**
>   * phy_read_mmd_indirect - reads data from the MMD registers
>   * @phydev: The PHY device bus
> @@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
>  		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
>  }
>  
> -/* User setting - can be taken from DTS */
> -#define RX_ID_DELAY	8
> -#define TX_ID_DELAY	0xa
> -#define FIFO_DEPTH	1
> +#if defined(CONFIG_DM_ETH)
> +/**
> + * dp83867_data_init - Convenience function for setting PHY specific data
> + *
> + * @phydev: the phy_device struct
> + */
> +static int dp83867_of_init(struct phy_device *phydev)
> +{
> +	struct dp83867_private *dp83867 = phydev->priv;
> +	struct udevice *dev = phydev->dev;
> +
> +	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
> +				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
> +
> +	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
> +				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
> +

this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay


Thanks,
Michal

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Dan Murphy]

Michal

On 04/05/2016 12:01 PM, Michal Simek wrote:
> On 5.4.2016 17:05, Dan Murphy wrote:
>> Not all devices use the same internal delay or fifo depth.
>> Add the ability to set the internal delay for rx or tx and the
>> fifo depth via the devicetree.  If the value is not set in the
>> devicetree then set the delay to the default.
>>
>> If devicetree is not used then use the default defines within the
>> driver.
>>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>>
>> RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/
>>
>>  drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
>>  1 file changed, 73 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
>> index c3912d5..e91a6ed 100644
>> --- a/drivers/net/phy/ti.c
>> +++ b/drivers/net/phy/ti.c
>> @@ -6,6 +6,14 @@
>>   */
>>  #include <common.h>
>>  #include <phy.h>
>> +#include <linux/compat.h>
>> +#include <malloc.h>
>> +
>> +#include <fdtdec.h>
>> +#include <dm.h>
>> +#include <dt-bindings/net/ti-dp83867.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>>  
>>  /* TI DP83867 */
>>  #define DP83867_DEVADDR		0x1f
>> @@ -57,6 +65,17 @@
>>  #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
>>  #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
>>  
>> +/* User setting - can be taken from DTS */
>> +#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
>> +#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
>> +#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
>> +
>> +struct dp83867_private {
>> +	int rx_id_delay;
>> +	int tx_id_delay;
>> +	int fifo_depth;
>> +};
>> +
>>  /**
>>   * phy_read_mmd_indirect - reads data from the MMD registers
>>   * @phydev: The PHY device bus
>> @@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
>>  		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
>>  }
>>  
>> -/* User setting - can be taken from DTS */
>> -#define RX_ID_DELAY	8
>> -#define TX_ID_DELAY	0xa
>> -#define FIFO_DEPTH	1
>> +#if defined(CONFIG_DM_ETH)
>> +/**
>> + * dp83867_data_init - Convenience function for setting PHY specific data
>> + *
>> + * @phydev: the phy_device struct
>> + */
>> +static int dp83867_of_init(struct phy_device *phydev)
>> +{
>> +	struct dp83867_private *dp83867 = phydev->priv;
>> +	struct udevice *dev = phydev->dev;
>> +
>> +	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>> +				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
>> +
>> +	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>> +				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
>> +
> this is not aligned with the binding you sent.
> ti,rx-internal-delay
> and
> ti,tx-internal-delay

You are right I will fix it and then make the same change in the kernel

Dan

>
>
> Thanks,
> Michal


-- 
------------------
Dan Murphy

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Michal Simek]

On 5.4.2016 19:18, Dan Murphy wrote:
> Michal
> 
> On 04/05/2016 12:01 PM, Michal Simek wrote:
>> On 5.4.2016 17:05, Dan Murphy wrote:
>>> Not all devices use the same internal delay or fifo depth.
>>> Add the ability to set the internal delay for rx or tx and the
>>> fifo depth via the devicetree.  If the value is not set in the
>>> devicetree then set the delay to the default.
>>>
>>> If devicetree is not used then use the default defines within the
>>> driver.
>>>
>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>> ---
>>>
>>> RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/
>>>
>>>  drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
>>>  1 file changed, 73 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
>>> index c3912d5..e91a6ed 100644
>>> --- a/drivers/net/phy/ti.c
>>> +++ b/drivers/net/phy/ti.c
>>> @@ -6,6 +6,14 @@
>>>   */
>>>  #include <common.h>
>>>  #include <phy.h>
>>> +#include <linux/compat.h>
>>> +#include <malloc.h>
>>> +
>>> +#include <fdtdec.h>
>>> +#include <dm.h>
>>> +#include <dt-bindings/net/ti-dp83867.h>
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>>  
>>>  /* TI DP83867 */
>>>  #define DP83867_DEVADDR		0x1f
>>> @@ -57,6 +65,17 @@
>>>  #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
>>>  #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
>>>  
>>> +/* User setting - can be taken from DTS */
>>> +#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
>>> +#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
>>> +#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
>>> +
>>> +struct dp83867_private {
>>> +	int rx_id_delay;
>>> +	int tx_id_delay;
>>> +	int fifo_depth;
>>> +};
>>> +
>>>  /**
>>>   * phy_read_mmd_indirect - reads data from the MMD registers
>>>   * @phydev: The PHY device bus
>>> @@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
>>>  		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
>>>  }
>>>  
>>> -/* User setting - can be taken from DTS */
>>> -#define RX_ID_DELAY	8
>>> -#define TX_ID_DELAY	0xa
>>> -#define FIFO_DEPTH	1
>>> +#if defined(CONFIG_DM_ETH)
>>> +/**
>>> + * dp83867_data_init - Convenience function for setting PHY specific data
>>> + *
>>> + * @phydev: the phy_device struct
>>> + */
>>> +static int dp83867_of_init(struct phy_device *phydev)
>>> +{
>>> +	struct dp83867_private *dp83867 = phydev->priv;
>>> +	struct udevice *dev = phydev->dev;
>>> +
>>> +	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>> +				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
>>> +
>>> +	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>> +				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
>>> +
>> this is not aligned with the binding you sent.
>> ti,rx-internal-delay
>> and
>> ti,tx-internal-delay
> 
> You are right I will fix it and then make the same change in the kernel

Why not just follow linux binding?
Changing binding in kernel will end up in deprecated binding for nothing.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 198 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20160405/113c5cf9/attachment.sig>

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Dan Murphy]

On 04/05/2016 12:36 PM, Michal Simek wrote:
> On 5.4.2016 19:18, Dan Murphy wrote:
>> Michal
>>
>> On 04/05/2016 12:01 PM, Michal Simek wrote:
>>> On 5.4.2016 17:05, Dan Murphy wrote:
>>>> Not all devices use the same internal delay or fifo depth.
>>>> Add the ability to set the internal delay for rx or tx and the
>>>> fifo depth via the devicetree.  If the value is not set in the
>>>> devicetree then set the delay to the default.
>>>>
>>>> If devicetree is not used then use the default defines within the
>>>> driver.
>>>>
>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>> ---
>>>>
>>>> RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/
>>>>
>>>>  drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
>>>>  1 file changed, 73 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
>>>> index c3912d5..e91a6ed 100644
>>>> --- a/drivers/net/phy/ti.c
>>>> +++ b/drivers/net/phy/ti.c
>>>> @@ -6,6 +6,14 @@
>>>>   */
>>>>  #include <common.h>
>>>>  #include <phy.h>
>>>> +#include <linux/compat.h>
>>>> +#include <malloc.h>
>>>> +
>>>> +#include <fdtdec.h>
>>>> +#include <dm.h>
>>>> +#include <dt-bindings/net/ti-dp83867.h>
>>>> +
>>>> +DECLARE_GLOBAL_DATA_PTR;
>>>>  
>>>>  /* TI DP83867 */
>>>>  #define DP83867_DEVADDR		0x1f
>>>> @@ -57,6 +65,17 @@
>>>>  #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
>>>>  #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
>>>>  
>>>> +/* User setting - can be taken from DTS */
>>>> +#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
>>>> +#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
>>>> +#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
>>>> +
>>>> +struct dp83867_private {
>>>> +	int rx_id_delay;
>>>> +	int tx_id_delay;
>>>> +	int fifo_depth;
>>>> +};
>>>> +
>>>>  /**
>>>>   * phy_read_mmd_indirect - reads data from the MMD registers
>>>>   * @phydev: The PHY device bus
>>>> @@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
>>>>  		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
>>>>  }
>>>>  
>>>> -/* User setting - can be taken from DTS */
>>>> -#define RX_ID_DELAY	8
>>>> -#define TX_ID_DELAY	0xa
>>>> -#define FIFO_DEPTH	1
>>>> +#if defined(CONFIG_DM_ETH)
>>>> +/**
>>>> + * dp83867_data_init - Convenience function for setting PHY specific data
>>>> + *
>>>> + * @phydev: the phy_device struct
>>>> + */
>>>> +static int dp83867_of_init(struct phy_device *phydev)
>>>> +{
>>>> +	struct dp83867_private *dp83867 = phydev->priv;
>>>> +	struct udevice *dev = phydev->dev;
>>>> +
>>>> +	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>>> +				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
>>>> +
>>>> +	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>>> +				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
>>>> +
>>> this is not aligned with the binding you sent.
>>> ti,rx-internal-delay
>>> and
>>> ti,tx-internal-delay
>> You are right I will fix it and then make the same change in the kernel
> Why not just follow linux binding?
> Changing binding in kernel will end up in deprecated binding for nothing.

What specific Linux binding are you referring to?

I don't see this binding getting changed as the internal delay and fifo depth
are board configurable options and I don't for see the register map changing for this
device.

Dan


> Thanks,
> Michal
>
>


-- 
------------------
Dan Murphy

[U-Boot] [uboot] [PATCH 2/2] net: phy: ti: Allow the driver to be more configurable

[Dan Murphy]

On 04/05/2016 01:30 PM, Dan Murphy wrote:
> On 04/05/2016 12:36 PM, Michal Simek wrote:
>> On 5.4.2016 19:18, Dan Murphy wrote:
>>> Michal
>>>
>>> On 04/05/2016 12:01 PM, Michal Simek wrote:
>>>> On 5.4.2016 17:05, Dan Murphy wrote:
>>>>> Not all devices use the same internal delay or fifo depth.
>>>>> Add the ability to set the internal delay for rx or tx and the
>>>>> fifo depth via the devicetree.  If the value is not set in the
>>>>> devicetree then set the delay to the default.
>>>>>
>>>>> If devicetree is not used then use the default defines within the
>>>>> driver.
>>>>>
>>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>>> ---
>>>>>
>>>>> RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/
>>>>>
>>>>>  drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
>>>>>  1 file changed, 73 insertions(+), 8 deletions(-)
>>>>>
>>>>> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
>>>>> index c3912d5..e91a6ed 100644
>>>>> --- a/drivers/net/phy/ti.c
>>>>> +++ b/drivers/net/phy/ti.c
>>>>> @@ -6,6 +6,14 @@
>>>>>   */
>>>>>  #include <common.h>
>>>>>  #include <phy.h>
>>>>> +#include <linux/compat.h>
>>>>> +#include <malloc.h>
>>>>> +
>>>>> +#include <fdtdec.h>
>>>>> +#include <dm.h>
>>>>> +#include <dt-bindings/net/ti-dp83867.h>
>>>>> +
>>>>> +DECLARE_GLOBAL_DATA_PTR;
>>>>>  
>>>>>  /* TI DP83867 */
>>>>>  #define DP83867_DEVADDR		0x1f
>>>>> @@ -57,6 +65,17 @@
>>>>>  #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
>>>>>  #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
>>>>>  
>>>>> +/* User setting - can be taken from DTS */
>>>>> +#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
>>>>> +#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
>>>>> +#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
>>>>> +
>>>>> +struct dp83867_private {
>>>>> +	int rx_id_delay;
>>>>> +	int tx_id_delay;
>>>>> +	int fifo_depth;
>>>>> +};
>>>>> +
>>>>>  /**
>>>>>   * phy_read_mmd_indirect - reads data from the MMD registers
>>>>>   * @phydev: The PHY device bus
>>>>> @@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
>>>>>  		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
>>>>>  }
>>>>>  
>>>>> -/* User setting - can be taken from DTS */
>>>>> -#define RX_ID_DELAY	8
>>>>> -#define TX_ID_DELAY	0xa
>>>>> -#define FIFO_DEPTH	1
>>>>> +#if defined(CONFIG_DM_ETH)
>>>>> +/**
>>>>> + * dp83867_data_init - Convenience function for setting PHY specific data
>>>>> + *
>>>>> + * @phydev: the phy_device struct
>>>>> + */
>>>>> +static int dp83867_of_init(struct phy_device *phydev)
>>>>> +{
>>>>> +	struct dp83867_private *dp83867 = phydev->priv;
>>>>> +	struct udevice *dev = phydev->dev;
>>>>> +
>>>>> +	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>>>> +				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
>>>>> +
>>>>> +	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>>>>> +				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
>>>>> +
>>>> this is not aligned with the binding you sent.
>>>> ti,rx-internal-delay
>>>> and
>>>> ti,tx-internal-delay
>>> You are right I will fix it and then make the same change in the kernel
>> Why not just follow linux binding?
>> Changing binding in kernel will end up in deprecated binding for nothing.
> What specific Linux binding are you referring to?
>
> I don't see this binding getting changed as the internal delay and fifo depth
> are board configurable options and I don't for see the register map changing for this
> device.

I see it now.  Will submit v3 of the driver but I will wait for additional comments
before sending tomorrow.


Dan

> Dan
>
>
>> Thanks,
>> Michal
>>
>>
>


-- 
------------------
Dan Murphy