From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 06 Apr 2016 00:03:23 +0200 Subject: [U-Boot] Newbie SPL question for socfpga_sockit In-Reply-To: <57037868.1080204@electromag.com.au> References: <56C53059.4020505@electromag.com.au> <56D662D4.40302@electromag.com.au> <56D7E389.5080308@electromag.com.au> <56DF7F80.4060602@electromag.com.au> <56E0010A.6010202@denx.de> <56EA09DA.5040504@denx.de> <56EEC7DE.7050605@opensource.altera.com> <56EED309.40305@denx.de> <56F17B81.1050301@opensource.altera.com> <56F6F695.8030204@denx.de> <57037868.1080204@electromag.com.au> Message-ID: <5704362B.30708@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 04/05/2016 10:33 AM, Phil Reid wrote: > On 27/03/2016 4:52 AM, Marek Vasut wrote: >> On 03/22/2016 06:06 PM, Dinh Nguyen wrote: >>> >>> >>> On 03/20/2016 11:42 AM, Marek Vasut wrote: >>>>> >>>>> Sorry, I know that doesn't help. So let's walk through my workflow. >>>>> I am >>>>> not using any Altera tools when I build. >>>>> >>>>> $make socfpga_de0_nano_soc_defconfig >>>>> $make u-boot-with-spl.sfp >>>>> $dd if=u-boot-with-spl.sfp of=/dev/sdb3 >>>>> >>>>> My gcc is: arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-12ubuntu1) 4.7.3 >>>>> >>>>> Has the board ever worked for you at all? Can you try this image: >>>>> >>>>> https://rocketboards.org/foswiki/view/Documentation/AtlasSoCSdCardImage >>>>> >>>>> >>>>> Dinh >>>> >>>> I just ported U-Boot to another customer board. I noticed QSPI has >>>> problems and USB can be flaky. That's the standard cache issue we >>>> have, disabling dcache fixed that. >>>> >>>> I am starting to wonder whether we're hitting some corner case here. >>>> Maybe we should eventually try and trace all the register reads and >>>> writes generated by the DDR calibration code both in old and new SPL >>>> and make a diff to see if something really did change. >>>> >>>> Dinh, can you share the marking on the SoC and the DRAMs on your board? >>>> >>> >>> My SoC is: >>> >>> 5CSEMA4U23C6N >>> CACAU1525A >>> >>> DRAMs are: >>> >>> ISSI 1510 >>> IS43TR16256A >>> 15HBL K080 >>> P4482100QER2 TWN >> >> Thanks, that's indeed rev. C . About time I bang my head against the >> desk because this is creepy. >> >> > FYI > > I've just spend some time trying to update the spl / uboot / kernel & > rootfs image on our > Altera socdk to use for some software testing / development. > Unfortunately it fails in the mem calibration process with the latest > uboot most of the time. > And when it does boot somtimes fails loading uboot fomr the mmc. Try this u-boot-socfpga/ddr branch [1] , see if it works for you. [1] http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/ddr > Our own design works fine. > > I've built different images using the qts files in uboot git and those > generated from quartus for the socdk. > > Both have the same reliability. > > It's an old revC board. > > Been running perfectly for months using the older spl / uboot. :( Great, see above, please let me know. -- Best regards, Marek Vasut