From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] FPGA detection failure on Cyclone V soc development kit
Date: Wed, 06 Apr 2016 21:28:07 +0200 [thread overview]
Message-ID: <57056347.8070901@denx.de> (raw)
In-Reply-To: <yw1xshyyy7x9.fsf@unicorn.mansr.com>
On 04/06/2016 07:16 PM, M?ns Rullg?rd wrote:
> Marek Vasut <marex@denx.de> writes:
>
>> On 04/06/2016 05:29 PM, Dinh Nguyen wrote:
>>> On Wed, Apr 6, 2016 at 10:07 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>>>>
>>>> I pushed some DDR fixes into u-boot-socfpga/ddr branch [1], which fixed
>>>> DDR calibration issue on a board I have in here. Can you try them ? Thanks
>>>>
>>>> [1]
>>>> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/ddr
>>>>
>>>
>>> I'll do it first thing when I get back from ELC.
>>
>> Cool. I will do proper submission by then. I think Mans had a CV SoCDK
>> which didn't boot with the mainline SPL, so it'd be cool if he could try.
>
> I will when I get back from ELC.
>
Thanks
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-04-06 19:28 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-20 20:31 [U-Boot] FPGA detection failure on Cyclone V soc development kit Måns Rullgård
2016-01-21 16:18 ` Tom Rini
2016-01-21 16:20 ` Måns Rullgård
2016-01-21 16:31 ` Marek Vasut
2016-01-22 16:35 ` Dinh Nguyen
2016-01-27 13:34 ` Chin Liang See
2016-01-27 13:46 ` Måns Rullgård
2016-01-27 14:16 ` Chin Liang See
2016-01-27 14:18 ` Måns Rullgård
2016-01-27 14:20 ` Chin Liang See
2016-04-06 15:07 ` Marek Vasut
2016-04-06 15:29 ` Dinh Nguyen
2016-04-06 16:48 ` Marek Vasut
2016-04-06 17:16 ` Måns Rullgård
2016-04-06 19:28 ` Marek Vasut [this message]
2016-04-12 13:54 ` Dinh Nguyen
2016-04-12 14:00 ` Marek Vasut
2016-04-12 14:17 ` Dinh Nguyen
2016-04-12 14:21 ` Marek Vasut
2016-04-06 16:06 ` Phil Reid
2016-02-01 22:25 ` Dinh Nguyen
2016-02-01 22:50 ` Marek Vasut
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